http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59036

            Bug ID: 59036
           Summary: [4.9 regression] Performance degradation after r204212
                    on 32-bit x86 targets.
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: ysrumyan at gmail dot com

After patch to improve register preferencing in IRA and to *remove regmove*
pass we noticed performance degradation on several benchmarks from eembc2.0
suite in 32-bit mode for all x86 targets (such as atom, slm, hsw, etc.).
This can be reproduced with attached test-case - after fix 3 more instructions
are generated for innermost loop (compiled with -O2 -m32 -march=core-avx2
options):

  before fix
.L4:
    movl    12(%esp), %edx
    addl    $3, %ecx
    movl    4(%esp), %ebx
    movl    (%esp), %ebp
    movl    8(%esp), %esi
    movzbl    (%edx,%eax), %edi
    movl    16(%esp), %edx
    movzbl    (%ebx,%eax), %ebx
    movzbl    (%esi,%eax), %esi
    addl    $1, %eax
    addl    (%edx,%edi,4), %ebp
    movzbl    0(%ebp,%ebx), %edx
    movl    28(%esp), %ebp
    movb    %dl, -3(%ecx)
    movl    24(%esp), %edx
    movl    (%edx,%edi,4), %edx
    movl    (%esp), %edi
    addl    0(%ebp,%esi,4), %edx
    leal    (%edi,%ebx), %ebp
    sarl    $16, %edx
    movzbl    0(%ebp,%edx), %edx
    movl    20(%esp), %ebp
    movb    %dl, -2(%ecx)
    movl    0(%ebp,%esi,4), %edx
    addl    %edi, %edx
    movzbl    (%edx,%ebx), %edx
    movb    %dl, -1(%ecx)
    cmpl    80(%esp), %eax
    jne    .L4

  after fix
.L4:
    movl    8(%esp), %ebx
    addl    $3, %edx
    movl    12(%esp), %esi
    movl    4(%esp), %ecx
    movzbl    (%ebx,%eax), %ebx
    movzbl    (%esi,%eax), %esi
    movzbl    (%ecx,%eax), %ecx
    addl    $1, %eax
    movb    %bl, (%esp)
    movl    16(%esp), %ebx
    movl    (%ebx,%esi,4), %ebp
    addl    %edi, %ebp
    movzbl    0(%ebp,%ecx), %ebx
    movzbl    (%esp), %ebp
    movb    %bl, -3(%edx)
    movl    24(%esp), %ebx
    movl    %ebp, (%esp)
    movl    (%ebx,%esi,4), %esi
    movl    28(%esp), %ebx
    addl    (%ebx,%ebp,4), %esi
    leal    (%edi,%ecx), %ebp
    sarl    $16, %esi
    movzbl    0(%ebp,%esi), %ebx
    movl    20(%esp), %esi
    movl    (%esp), %ebp
    movb    %bl, -2(%edx)
    movl    %edi, %ebx
    addl    (%esi,%ebp,4), %ebx
    movzbl    (%ebx,%ecx), %ecx
    movb    %cl, -1(%edx)
    cmpl    80(%esp), %eax
    jne    .L4

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