[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86

2008-09-06 Thread ubizjak at gmail dot com
--- Comment #19 from ubizjak at gmail dot com 2008-09-06 16:18 --- Exact duplicate of PR 17236. Mainline gcc (4.4.0 20080906, IRA) generates: pushl %ebx movl8(%esp), %eax movl16(%esp), %edx movl20(%esp), %ecx movl12(%esp), %ebx

[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86

2007-12-19 Thread rask at gcc dot gnu dot org
--- Comment #18 from rask at gcc dot gnu dot org 2007-12-19 14:15 --- Created an attachment (id=14795) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=14795action=view) (u)mulsidi3 patch This patch (in testing) improves the register allocation, removing the last redundant movl

[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86

2007-11-23 Thread rask at gcc dot gnu dot org
--- Comment #16 from rask at gcc dot gnu dot org 2007-11-23 20:43 --- (In reply to comment # I think the bug can be closed as fixed now. I'm not so convinced. This part leal(%ecx,%edx), %esi movl%esi, %edx movl4(%esp), %esi should have been

[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86

2007-11-23 Thread steven at gcc dot gnu dot org
--- Comment #17 from steven at gcc dot gnu dot org 2007-11-23 20:48 --- And we're not going to keep every ra bug open. This just spoils bugzilla search results. *** This bug has been marked as a duplicate of 17236 *** -- steven at gcc dot gnu dot org changed: What

[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86

2007-11-22 Thread ubizjak at gmail dot com
--- Comment #15 from ubizjak at gmail dot com 2007-11-23 07:43 --- (In reply to comment #13) I think the bug can be closed as fixed now. The problem of redundant stores has been fixed, but the code is far from optimal. As evident from PR 17236, icc generates: movl

[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86

2007-11-22 Thread steven at gcc dot gnu dot org
--- Comment #14 from steven at gcc dot gnu dot org 2007-11-23 07:36 --- . -- steven at gcc dot gnu dot org changed: What|Removed |Added Status|NEW

[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86

2007-11-22 Thread ismail at pardus dot org dot tr
--- Comment #13 from ismail at pardus dot org dot tr 2007-11-23 06:02 --- Mainline now looks like : [~] cat mul.s .file mul.c .text .p2align 4,,15 .globl mul .type mul, @function mul: subl$8, %esp movl%ebx, (%esp)

[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86

2005-06-27 Thread bruno at clisp dot org
--- Additional Comments From bruno at clisp dot org 2005-06-27 11:50 --- Indeed, the result is much better now, nearly optimal. As you say, the only further optimization possible is that a better register allocation could get rid of the movl%edx, %esi and movl

[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86

2005-06-26 Thread steven at gcc dot gnu dot org
--- Additional Comments From steven at gcc dot gnu dot org 2005-06-26 13:35 --- Today's results (-O2 -m32 -march=i686 -mtune=i686 -fomit-frame-pointer): .file t.c .text .p2align 4,,15 .globl mul .type mul, @function mul: subl$12,

[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86

2004-10-11 Thread bruno at clisp dot org
--- Additional Comments From bruno at clisp dot org 2004-10-11 11:55 --- This result is even better: shorter than the previous ones, and there are no useless moves between registers any more. However, there are more useless moves from register to stack slot and back from stack slot

[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86

2004-10-10 Thread pinskia at gcc dot gnu dot org
--- Additional Comments From pinskia at gcc dot gnu dot org 2004-10-11 02:57 --- Here is the latest asm from the mainline: mul: subl$20, %esp movl32(%esp), %ecx movl24(%esp), %eax movl%ebx, 8(%esp) movl36(%esp), %ebx