https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071
--- Comment #22 from Eric Botcazou ---
> So MIPS fundamentally needs this feature to work correctly; whether AArch64
> needs it or may just benefit from it depends on a lot of detailed knowledge
> of the ISA and architecture. Given Richard
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071
--- Comment #20 from Eric Botcazou ---
> How is this any different from 32-bit operations in say MIPS? The only
> difference seems to be that MIPS sign-extends 32-bit operations to 64 bit
> while AArch64 zero-extends. If that's correct for MIPS
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071
mpf at gcc dot gnu.org changed:
What|Removed |Added
CC||mpf at gcc dot gnu.org
---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071
--- Comment #19 from Wilco ---
(In reply to Eric Botcazou from comment #16)
> > Also I wonder whether this means AArch64 should set it since targets like
> > MIPS
> > and Sparc already set it.
>
> There seems to be a good reason against
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071
--- Comment #17 from Eric Botcazou ---
Author: ebotcazou
Date: Wed Jan 31 15:01:40 2018
New Revision: 257237
URL: https://gcc.gnu.org/viewcvs?rev=257237=gcc=rev
Log:
PR rtl-optimization/84071
* doc/tm.texi.in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071
--- Comment #18 from Eric Botcazou ---
Author: ebotcazou
Date: Wed Jan 31 15:01:53 2018
New Revision: 257238
URL: https://gcc.gnu.org/viewcvs?rev=257238=gcc=rev
Log:
PR rtl-optimization/84071
* doc/tm.texi.in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071
Eric Botcazou changed:
What|Removed |Added
CC|ebotcazou at gcc dot gnu.org |
--- Comment #16 from Eric
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071
--- Comment #15 from Wilco ---
(In reply to Eric Botcazou from comment #10)
> > The addition is performed on the full 32-bit register, so this obviously
> > means that the top 24 bits have an undefined value.
>
> Not if the entire registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071
Eric Botcazou changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071
--- Comment #13 from Eric Botcazou ---
Author: ebotcazou
Date: Wed Jan 31 10:08:08 2018
New Revision: 257226
URL: https://gcc.gnu.org/viewcvs?rev=257226=gcc=rev
Log:
PR rtl-optimization/84071
* combine.c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071
--- Comment #12 from Eric Botcazou ---
Author: ebotcazou
Date: Wed Jan 31 10:03:06 2018
New Revision: 257224
URL: https://gcc.gnu.org/viewcvs?rev=257224=gcc=rev
Log:
PR rtl-optimization/84071
* combine.c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071
Eric Botcazou changed:
What|Removed |Added
Component|middle-end |rtl-optimization
--- Comment #11 from
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