https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89271
Bug ID: 89271 Summary: gcc.target/powerpc/vsx-simode2.c stopped working in GCC 9 Product: gcc Version: unknown Status: UNCONFIRMED Severity: normal Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: segher at gcc dot gnu.org Target Milestone: --- In GCC 8 and earlier, this generates mtvsrwz 32,3 #APP # 10 "vsx-simode2.c" 1 xxlor 32,32,32 # v, v constraints # 0 "" 2 #NO_APP mfvsrwz 3,32 blr but in GCC 9 it is std 3,-16(1) ori 2,2,0 lwz 9,-12(1) mtvsrwz 32,9 #APP # 10 "vsx-simode2.c" 1 xxlor 32,32,32 # v, v constraints # 0 "" 2 #NO_APP mfvsrwz 3,32 blr and soon it will be std 3,-16(1) addi 9,1,-12 lxsiwzx 32,0,9 blr [ Hrm, no ori 2,2,0? And it is better to do li 9,-12 etc. ] This is because IRA does r125: preferred NO_REGS, alternative NO_REGS, allocno NO_REGS a1(r125,l0) costs: BASE_REGS:14004,14004 GENERAL_REGS:14004,14004- LINK_REGS:24010,24010 CTR_REGS:24010,24010 LINK_OR_CTR_REGS:24010,24010- SPEC_OR_GEN_REGS:24010,24010 MEM:12000,12000 and it then chooses disposition mem for r125. In GCC 8 and before combine already has decided to use GPR3 (the first argument register) for this, so there was no RA here before.