[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2022-02-22 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #20 from CVS Commits --- The master branch has been updated by Christophe Lyon : https://gcc.gnu.org/g:fd0ab7c734b04b91653467b94afd48ceca122083 commit r12-7356-gfd0ab7c734b04b91653467b94afd48ceca122083 Author: Christophe Lyon

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2022-02-22 Thread clyon at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 Christophe Lyon changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2022-02-22 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #18 from CVS Commits --- The master branch has been updated by Christophe Lyon : https://gcc.gnu.org/g:c6b4ea7ab1aa6c5c07798fa6c6ad15dd1761b5ed commit r12-7344-gc6b4ea7ab1aa6c5c07798fa6c6ad15dd1761b5ed Author: Christophe Lyon

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2022-02-22 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #17 from CVS Commits --- The master branch has been updated by Christophe Lyon : https://gcc.gnu.org/g:6a7c13a0cf2290b60ab36f9ce1027b92838586bd commit r12-7343-g6a7c13a0cf2290b60ab36f9ce1027b92838586bd Author: Christophe Lyon

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2022-02-22 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #16 from CVS Commits --- The master branch has been updated by Christophe Lyon : https://gcc.gnu.org/g:724d6566cd11c676f3bc082a9771784c825affb1 commit r12-7342-g724d6566cd11c676f3bc082a9771784c825affb1 Author: Christophe Lyon

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2022-02-22 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #15 from CVS Commits --- The master branch has been updated by Christophe Lyon : https://gcc.gnu.org/g:e6a4aefce8e47a7d3ba781066a1410ebfa963e59 commit r12-7341-ge6a4aefce8e47a7d3ba781066a1410ebfa963e59 Author: Christophe Lyon

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2022-02-22 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #14 from CVS Commits --- The master branch has been updated by Christophe Lyon : https://gcc.gnu.org/g:91224cf625dc90304bb515a0cc602beed48fe3da commit r12-7339-g91224cf625dc90304bb515a0cc602beed48fe3da Author: Christophe Lyon

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2022-02-22 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #13 from CVS Commits --- The master branch has been updated by Christophe Lyon : https://gcc.gnu.org/g:884f77b489510e1df9db2889b60c5df6fcda commit r12-7338-g884f77b489510e1df9db2889b60c5df6fcda Author: Christophe Lyon

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2022-01-17 Thread rguenth at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 Richard Biener changed: What|Removed |Added Priority|P3 |P1

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2021-07-09 Thread clyon at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #12 from Christophe Lyon --- As I am going on holidays until August (back only 2 days until then), I thought I should share my WIP here. No sure that's the right direction, anyway that's not working yet.

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2021-07-07 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #11 from Richard Earnshaw --- (In reply to Christophe Lyon from comment #10) > This was introduced by my change at r12-671 in mve.md: > -;; [vcmpneq_]) > +;; [vcmpneq_, vcmpcsq_, vcmpeqq_, vcmpgeq_, vcmpgtq_, vcmphiq_, vcmpleq_, >

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2021-07-07 Thread clyon at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #10 from Christophe Lyon --- This was introduced by my change at r12-671 in mve.md: -;; [vcmpneq_]) +;; [vcmpneq_, vcmpcsq_, vcmpeqq_, vcmpgeq_, vcmpgtq_, vcmphiq_, vcmpleq_, vcmpltq_]) ;; -(define_insn "mve_vcmpneq_" +(define_insn

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2021-07-07 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #9 from Richard Earnshaw --- (insn 7 4 8 2 (set (reg:HI 117) (eq:HI (reg:V16QI 119) (reg:V16QI 120))) {mve_vcmpeqq_v16qi} (expr_list:REG_DEAD (reg:V16QI 120) (expr_list:REG_DEAD (reg:V16QI 119)

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2021-07-07 Thread clyon at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #8 from Christophe Lyon --- Indeed, it's what happens in try_combine(): i2src = subst (i2src, pc_rtx, pc_rtx, 0, 0, 0); converts i2src (zero_extend:SI (reg:HI 117)) into: (and:SI (subreg:SI (reg:HI 117) 0) (const_int 1 [0x1]))

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2021-07-07 Thread clyon at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #7 from Christophe Lyon --- Before the patch: Trying 8 -> 14: 8: r113:SI=zero_extend(r117:HI) REG_DEAD r117:HI 14: r0:SI=r113:SI REG_DEAD r113:SI Successfully matched this instruction: (set (reg/i:SI 0 r0)

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2021-07-07 Thread clyon at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #6 from Christophe Lyon --- Before r12-671 before combine we have: (insn 7 4 8 2 (set (reg:HI 117) (unspec:HI [ (reg/v:V16QI 115 [ v ]) (reg/v:V16QI 116 [ w ]) ] VCMPEQQ_S))

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2021-07-07 Thread clyon at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 --- Comment #5 from Christophe Lyon --- Before the patch, combine says: allowing combination of insns 8 and 14 original costs 4 + 2 = 6 replacement cost 4 deferring deletion of insn with uid = 8. modifying insn i314:

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2021-07-07 Thread clyon at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 Christophe Lyon changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2021-07-06 Thread clyon at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 Christophe Lyon changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |clyon at gcc dot gnu.org ---

[Bug target/101325] [12 Regression] arm: Wrong code with MVE vcmpeqq intrinsic since r12-671-gd083fbf72

2021-07-06 Thread acoplan at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101325 Alex Coplan changed: What|Removed |Added Summary|[12 Regression] arm: Wrong |[12 Regression] arm: Wrong