https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105213
Bug ID: 105213
Summary: Extend __builtin_{un,}pack_{longdouble,ibm128} valid
for soft-float
Product: gcc
Version: 12.0
URL: https://gcc.gnu.org/pipermail/gcc-patches/2021-Decembe
r/586712.html,https://gcc.gnu.org/pipermail/gcc-patche
s/2022-March/591147.html
Status: UNCONFIRMED
Keywords: accepts-invalid, ice-on-invalid-code
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: linkw at gcc dot gnu.org
CC: asolokha at gmx dot com, bergner at gcc dot gnu.org,
linkw at gcc dot gnu.org, segher at gcc dot gnu.org
Depends on: 103623
Target Milestone: ---
Target: powerpc-*-linux-gnu
+++ This bug was initially created as a clone of Bug #103623 +++
As PR103623 shows, we don't support __builtin_{un,}pack_{longdouble,ibm128} for
soft-float before, as Segher and Peter pointed out, we should make it
available.
Segher posted one patch to fix the reload ICE like:
===
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index fdfbc6566a5c..f05b8358ba0a 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -14580,10 +14580,10 @@ (define_insn_and_split "unpack<mode>_dm"
[(set_attr "type" "fp,fpstore,mtvsr,mfvsr,store")])
(define_insn_and_split "unpack<mode>_nodm"
- [(set (match_operand:<FP128_64> 0 "nonimmediate_operand" "=d,m")
+ [(set (match_operand:<FP128_64> 0 "nonimmediate_operand" "=d,m,m")
(unspec:<FP128_64>
- [(match_operand:FMOVE128 1 "register_operand" "d,d")
- (match_operand:QI 2 "const_0_to_1_operand" "i,i")]
+ [(match_operand:FMOVE128 1 "register_operand" "d,d,r")
+ (match_operand:QI 2 "const_0_to_1_operand" "i,i,i")]
UNSPEC_UNPACK_128BIT))]
"(!TARGET_POWERPC64 || !TARGET_DIRECT_MOVE) && FLOAT128_2REG_P (<MODE>mode)"
"#"
@@ -14600,7 +14600,7 @@ (define_insn_and_split "unpack<mode>_nodm"
operands[3] = gen_rtx_REG (<FP128_64>mode, fp_regno);
}
- [(set_attr "type" "fp,fpstore")])
+ [(set_attr "type" "fp,fpstore,store")])
(define_insn_and_split "pack<mode>"
[(set (match_operand:FMOVE128 0 "register_operand" "=&d")
===
It needs more test coverage and documentation change in GCC13.
Referenced Bugs:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103623
[Bug 103623] [12 Regression] error: unable to generate reloads (ICE in
curr_insn_transform, at lra-constraints.c:4132), or error: insn does not
satisfy its constraints (ICE in extract_constrain_insn_cached, at recog.c:2682)
