https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108267
Bug ID: 108267 Summary: [13 Regression] Bootstrap failure on aarch64-linux since r13-4953 Product: gcc Version: 13.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: jakub at gcc dot gnu.org Target Milestone: --- My aarch64 bootstrap fails with: ../../../libgcc/unwind-dw2.c: In function 'init_dwarf_reg_size_table': ../../../libgcc/unwind-dw2.c:1334:3: error: this operation requires the SVE ISA extension 1334 | __builtin_init_dwarf_reg_size_table (dwarf_reg_size_table); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../../../libgcc/unwind-dw2.c:1334:3: note: you can enable SVE using the command-line option '-march', or by using the 'target' attribute or pragma ../../../libgcc/unwind-dw2.c:1334: confused by earlier errors, bailing out Trying to compile even simple: static unsigned char dwarf_reg_size_table[__LIBGCC_DWARF_FRAME_REGISTERS__+1]; void foo (void) { __builtin_init_dwarf_reg_size_table (dwarf_reg_size_table); } with -O2 -nostdinc -fbuilding-libgcc before that change used to give different results between when SVE was on and when it wasn't (v0 .. v31 registers get dwarf_reg_size_table[32 .. 63] = 8 when unwind-dw2.o is compiled without SVE and result of cntd with it (it isn't clear to me how this is supposed to work because clearly unwind-dw2.o compiled with SVE can't be used on CPUs without SVE), but now it just ICEs without SVE: ./cc1 -quiet -O2 -nostdinc a.c -fbuilding-libgcc -o a.s2 a.c: In function ‘foo’: a.c:6:3: error: this operation requires the SVE ISA extension 6 | __builtin_init_dwarf_reg_size_table (dwarf_reg_size_table); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ a.c:6:3: note: you can enable SVE using the command-line option ‘-march’, or by using the ‘target’ attribute or pragma during RTL pass: expand a.c:6:3: internal compiler error: Segmentation fault 0x1567ab0 crash_signal ../../gcc/toplev.cc:314 0xdc56ff single_set(rtx_insn const*) ../../gcc/rtl.h:3594 0xfd150c emit_move_insn(rtx_def*, rtx_def*) ../../gcc/expr.cc:4345 0xf9f8b6 force_reg(machine_mode, rtx_def*) ../../gcc/explow.cc:688 0x23040e7 gen_movqi(rtx_def*, rtx_def*) ../../gcc/config/aarch64/aarch64.md:1207 0xe02abe rtx_insn* insn_gen_fn::operator()<rtx_def*, rtx_def*>(rtx_def*, rtx_def*) const ../../gcc/recog.h:407 0xfd09c1 emit_move_insn_1(rtx_def*, rtx_def*) ../../gcc/expr.cc:4172 0xfd14e5 emit_move_insn(rtx_def*, rtx_def*) ../../gcc/expr.cc:4342 0xef7e00 expand_builtin_init_dwarf_reg_sizes(tree_node*) ../../gcc/dwarf2cfi.cc:380