--- Comment #4 from ubizjak at gmail dot com 2007-04-05 12:29 ---
(In reply to comment #2)
To implement this optimization, some support from assembler is needed. When
displacement overflows 8bit, assembler should substitute jecxz with
equivalent test/jmp rel{16,32} sequence.
--- Comment #5 from steven at gcc dot gnu dot org 2007-04-05 12:54 ---
Can we compute the displacement reliable enough to say that it is smaller than
some other number (e.g. 64)?
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29793
--- Comment #6 from ubizjak at gmail dot com 2007-04-05 16:27 ---
(In reply to comment #5)
Can we compute the displacement reliable enough to say that it is smaller than
some other number (e.g. 64)?
Good idea!
The (untested) patch that handles SImode compares is at
--- Comment #2 from ubizjak at gmail dot com 2006-11-10 10:54 ---
(In reply to comment #0)
The Test instruction applied to the rCX register followed by a Jump if Zero
with an 8-bit displacement can be replaced by a single JCXZ/JECXZ/JRCXZ
The problem is in with an 8-bit displacement.
--- Comment #3 from ubizjak at gmail dot com 2006-11-10 11:18 ---
Following asm illustrates the problem:
.file jcx.c
.text
.p2align 4,,15
.globl blah
.type blah, @function
blah:
pushl %ebp
movl%esp, %ebp
subl$8, %esp
--- Comment #1 from nmiell at comcast dot net 2006-11-10 06:59 ---
Created an attachment (id=12585)
-- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=12585action=view)
little C demonstration
This is a test function in C that demonstrate a case where gcc could be using
JrCXZ and isn't.
