http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55302
Bug #: 55302
Summary: [SH] Add support for logical ops with GBR mems
Classification: Unclassified
Product: gcc
Version: 4.8.0
Status: UNCONFIRMED
Severity: enhancement
Priority: P3
Component: target
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: olege...@gcc.gnu.org
Target: sh*-*-*
Since now GCC supports GBR based mem refs through the __builtin_thread_pointer
function (PR 54760), support for logical operations on QImode GBR mem refs
could be added. The insns in question are:
and.b #imm,@(r0,gbr)
or.b #imm,@(r0,gbr)
tst.b #imm,@(r0,gbr)
xor.b #imm,@(r0,gbr)
Although the insns are slower than using separate loads/stores and operation
insn sequences, the resulting code can be potentially more compact. It might
be beneficial to enable these insns when optimizing for size.
