http://gcc.gnu.org/bugzilla/show_bug.cgi?id=61153
Bug ID: 61153
Summary: [ARM] vbic vorn tests fail
Product: gcc
Version: 4.10.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: christophe.lyon at st dot com
Since commit 210216 "Neon intrinsics TLC - Replace intrinsics with GNU C
implementations", I have noticed regressions in the following tests:
gcc.target/arm/neon/vbicQs16.c scan-assembler vbic[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vbicQs32.c scan-assembler vbic[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vbicQs64.c scan-assembler vbic[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vbicQs8.c scan-assembler vbic[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vbicQu16.c scan-assembler vbic[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vbicQu32.c scan-assembler vbic[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vbicQu64.c scan-assembler vbic[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vbicQu8.c scan-assembler vbic[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vbics16.c scan-assembler vbic[ \t]+[dD][0-9]+,
[dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vbics32.c scan-assembler vbic[ \t]+[dD][0-9]+,
[dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vbics8.c scan-assembler vbic[ \t]+[dD][0-9]+, [dD][0-9]+,
[dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vbicu16.c scan-assembler vbic[ \t]+[dD][0-9]+,
[dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vbicu32.c scan-assembler vbic[ \t]+[dD][0-9]+,
[dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vbicu8.c scan-assembler vbic[ \t]+[dD][0-9]+, [dD][0-9]+,
[dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vornQs16.c scan-assembler vorn[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vornQs32.c scan-assembler vorn[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vornQs64.c scan-assembler vorn[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vornQs8.c scan-assembler vorn[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vornQu16.c scan-assembler vorn[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vornQu32.c scan-assembler vorn[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vornQu64.c scan-assembler vorn[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vornQu8.c scan-assembler vorn[ \t]+[qQ][0-9]+,
[qQ][0-9]+, [qQ][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vorns16.c scan-assembler vorn[ \t]+[dD][0-9]+,
[dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vorns32.c scan-assembler vorn[ \t]+[dD][0-9]+,
[dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vorns8.c scan-assembler vorn[ \t]+[dD][0-9]+, [dD][0-9]+,
[dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vornu16.c scan-assembler vorn[ \t]+[dD][0-9]+,
[dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vornu32.c scan-assembler vorn[ \t]+[dD][0-9]+,
[dD][0-9]+, [dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
gcc.target/arm/neon/vornu8.c scan-assembler vorn[ \t]+[dD][0-9]+, [dD][0-9]+,
[dD][0-9]+!?([ \t]+@[a-zA-Z0-9 ]+)?\n
with many --with-target/--with-cpu/--with-fpu configurations as can be seen on
http://cbuild.validation.linaro.org/build/cross-validation/gcc/210216/report-build-info.html
