[Bug target/62173] [5.0 regression] [AArch64] Performance regression due to r213488

2014-11-24 Thread jiwang at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173 --- Comment #7 from Jiong Wang jiwang at gcc dot gnu.org --- (In reply to bin.cheng from comment #6) Em, is offset valid for [reg+offset] addressing mode? if it is, why don't we transform reg+reg+offset into regX - reg + reg; [regX + offset];?

[Bug target/62173] [5.0 regression] [AArch64] Performance regression due to r213488

2014-11-24 Thread jiwang at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173 --- Comment #8 from Jiong Wang jiwang at gcc dot gnu.org --- while above associate virtual_stack_var_rtx with constant offset actually cause another hidding issue. I assume after the association, we are generating cleaner insn sequences. given

[Bug target/62173] [5.0 regression] [AArch64] Performance regression due to r213488

2014-11-24 Thread jiwang at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173 --- Comment #9 from Jiong Wang jiwang at gcc dot gnu.org --- To summary, given the following testcases: case A.C === void bar(int i) { char A[10]; g(A); f(A[i]); } case B.c === void bar(int i) {

[Bug target/62173] [5.0 regression] [AArch64] Performance regression due to r213488

2014-11-24 Thread rguenth at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173 Richard Biener rguenth at gcc dot gnu.org changed: What|Removed |Added Priority|P3 |P1

[Bug target/62173] [5.0 regression] [AArch64] Performance regression due to r213488

2014-11-24 Thread jiwang at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173 --- Comment #10 from Jiong Wang jiwang at gcc dot gnu.org --- Finished a further investigation, looks like the simplest fix to genrate optimized code for case A is to add one more optimization case in eliminate_regs_in_insn. currently we only

[Bug target/62173] [5.0 regression] [AArch64] Performance regression due to r213488

2014-11-16 Thread amker.cheng at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173 bin.cheng amker.cheng at gmail dot com changed: What|Removed |Added CC||amker.cheng at

[Bug target/62173] [5.0 regression] [AArch64] Performance regression due to r213488

2014-11-14 Thread jiwang at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173 --- Comment #5 from Jiong Wang jiwang at gcc dot gnu.org --- The root cause is AArch64's TARGET_LEGITIMIZE_ADDRESS are not doing well when the input is ((reg + reg) + offset). looks like currently we have considered reg + non_normal_offset, and

[Bug target/62173] [5.0 regression] [AArch64] Performance regression due to r213488

2014-11-14 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173 Ramana Radhakrishnan ramana at gcc dot gnu.org changed: What|Removed |Added Status|NEW |ASSIGNED

[Bug target/62173] [5.0 regression] [AArch64] Performance regression due to r213488

2014-10-28 Thread jiwang at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173 --- Comment #4 from Jiong Wang jiwang at gcc dot gnu.org --- interesting. r213488 was doing something right, and I guess it exposed some other hidding issues which need our investigations.