https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67127
Bug ID: 67127 Summary: [ARM] Avoiding odd-number ldrd/strd in movdi introduced a regression on armeb-linux-gnueabihf Product: gcc Version: 6.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: yroux at gcc dot gnu.org Target Milestone: --- Hi, Commit r225461 which avoids odd-number ldrd/strd in movdi, and its backport on gcc-5-branch (r225467) introduced several segfault (stack overflow) in the testsuite when the compiler is built for big-endian + vfp targets. The issue is that the movdi pattern calls gen_lowpart (SImode, operands[0]), operands being in DImode, but the mode of the register cannot be changed as it is explained in the macro CANNOT_CHANGE_MODE_CLASS definition: "In big-endian mode, modes greater than word size (i.e. DFmode) are stored in VFP registers in little-endian order. We can't describe that accurately to GCC, so avoid taking subregs of such values." Thus, gen_lowpart_general makes a copy of that register and copy it, which calls again emit_move_insn and gen_movdi and so on ... I've a patch under test that prevent doing this when the mode of a register can't be changed, but the regression discussed in this thread may be back then... https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00216.html