[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-23 Thread thgarnie at google dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #18 from Thomas Garnier --- Ok. Opened: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84011

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-23 Thread hjl.tools at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #17 from H.J. Lu --- (In reply to Thomas Garnier from comment #16) > Yes, I think you can't just default to the non-PIE mode. > > Clang does it well though: > > : >0: 83 ff 16cmp$0x16,%edi

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-23 Thread thgarnie at google dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #16 from Thomas Garnier --- Yes, I think you can't just default to the non-PIE mode. Clang does it well though: : 0: 83 ff 16cmp$0x16,%edi 3: 77 0f ja 14

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-23 Thread hjl.tools at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #15 from H.J. Lu --- (In reply to Thomas Garnier from comment #14) > Correcting what I said before, it is about re-enabling switch folding (or > switch optimization). > > Basically without PIE (-fno-PIE) with -O2, a switch can be

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-23 Thread thgarnie at google dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #14 from Thomas Garnier --- Correcting what I said before, it is about re-enabling switch folding (or switch optimization). Basically without PIE (-fno-PIE) with -O2, a switch can be optimized to be: : 0: b8

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-23 Thread thgarnie at google dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #13 from Thomas Garnier --- Created attachment 43223 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=43223=edit testcase for switch folding No switch folding if built with: $CC -O2 -fno-PIE -c -o switch ./switch.c Switch

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-23 Thread hjl.tools at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #12 from H.J. Lu --- (In reply to Thomas Garnier from comment #11) > I think for this file using only -mcmodel=large makes more sense. > > Given the proposed option (-fstatic-pie) is not kernel specific, the TLS is Sounds

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-23 Thread thgarnie at google dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #11 from Thomas Garnier --- I think for this file using only -mcmodel=large makes more sense. Given the proposed option (-fstatic-pie) is not kernel specific, the TLS is not needed. What do you think about disabling optimization

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-19 Thread hjl.tools at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #10 from H.J. Lu --- (In reply to Thomas Garnier from comment #9) > I tested the change against a modified version of the proposed Linux x86_64 > PIE support. The changes removes all the PLT32 and GOT64 entry but I still > get

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-19 Thread thgarnie at google dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #9 from Thomas Garnier --- I tested the change against a modified version of the proposed Linux x86_64 PIE support. The changes removes all the PLT32 and GOT64 entry but I still get R_X86_64_GOTPC64 & R_X86_64_GOTOFF64 relocations on

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-19 Thread thgarnie at google dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 Thomas Garnier changed: What|Removed |Added Attachment #43189|0 |1 is obsolete|

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-19 Thread thgarnie at google dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #7 from Thomas Garnier --- Created attachment 43189 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=43189=edit testcase for mcmodel=large Build with: gcc -mcmodel=large -c -fstatic-pie ./test.c -o test Dump relocations on the

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-17 Thread hjl.tools at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #6 from H.J. Lu --- (In reply to Thomas Garnier from comment #5) > I didn't try the patch yet, that could be a good starting point (still need > change in switch optimization and segment registers). What is the > consequence of the

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-17 Thread thgarnie at google dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #5 from Thomas Garnier --- I didn't try the patch yet, that could be a good starting point (still need change in switch optimization and segment registers). What is the consequence of the change in default_binds_local_p_3? Is it

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-17 Thread hjl.tools at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #4 from H.J. Lu --- (In reply to Kees Cook from comment #3) > Any progress on getting this into a GCC release? Has anyone tried my patch at all? Does it work?

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2018-01-17 Thread kees at outflux dot net
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 Kees Cook changed: What|Removed |Added CC||kees at outflux dot net --- Comment #3 from

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2017-09-23 Thread hjl.tools at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2017-09-23 Thread hjl.tools at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #2 from H.J. Lu --- Created attachment 42232 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=42232=edit A patch to add -fstatic-PIE/-fstatic-pie

[Bug target/82303] Better PIE/PIC code generation for kernel code (x86_64 & arm64)

2017-09-22 Thread hjl.tools at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303 --- Comment #1 from H.J. Lu --- A static PIE option can be used for both kernel as well as user space.