https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
--- Comment #12 from rguenther at suse dot de ---
On Thu, 25 Apr 2019, hjl.tools at gmail dot com wrote:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
>
> --- Comment #11 from H.J. Lu ---
> (In reply to Hongtao.liu from comment #7)
> >
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
--- Comment #11 from H.J. Lu ---
(In reply to Hongtao.liu from comment #7)
> Yes, C++ with NRV optization, so the alignment of (res) is 4.
> and the alignment of res is 16 in C.
>
> g++/test.i.158t.vect:
>
> ../test.i:8:23: note: recording
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
--- Comment #10 from rguenther at suse dot de ---
On Thu, 25 Apr 2019, crazylht at gmail dot com wrote:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
>
> --- Comment #9 from Hongtao.liu ---
> Also what's better between aligned
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
--- Comment #9 from Hongtao.liu ---
Also what's better between aligned load/store of smaller size VS unaligned
load/store of bigger size?
aligned load/store of smaller size:
movq%rdx, (%rdi)
movq-56(%rsp), %rdx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
--- Comment #8 from Hongtao.liu ---
Cost_model for Function vect_enhance_data_refs_alignment are quite tunable.
More benchmarks are needed if we want to do so.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
--- Comment #7 from Hongtao.liu ---
Yes, C++ with NRV optization, so the alignment of (res) is 4.
and the alignment of res is 16 in C.
g++/test.i.158t.vect:
../test.i:8:23: note: recording new base alignment for &
alignment:4
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
--- Comment #6 from rguenther at suse dot de ---
On Wed, 24 Apr 2019, jakub at gcc dot gnu.org wrote:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
>
> --- Comment #5 from Jakub Jelinek ---
> That would be likely NRV optimization in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
--- Comment #5 from Jakub Jelinek ---
That would be likely NRV optimization in the C++ FE, but then why doesn't the
generic NRV optimization handle it in the middle-end later on?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
Richard Biener changed:
What|Removed |Added
CC||rguenth at gcc dot gnu.org
--- Comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
--- Comment #3 from Hongtao.liu ---
(In reply to Hongtao.liu from comment #2)
> It seems such code generation is r254855's intention.
>
> /* Use 256-bit AVX instructions instead of 512-bit AVX
> instructions
> 4695
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
--- Comment #2 from Hongtao.liu ---
It seems such code generation is r254855's intention.
/* Use 256-bit AVX instructions instead of 512-bit AVX
instructions
4695 in the auto-vectorizer. */
4696
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90204
Jakub Jelinek changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
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