[Bug libstdc++/78389] list::merge and list::sort are not exception safe

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78389 --- Comment #6 from ville at gcc dot gnu.org --- Author: ville Date: Mon Jan 16 11:36:33 2017 New Revision: 244490 URL: https://gcc.gnu.org/viewcvs?rev=244490=gcc=rev Log: PR libstdc++/78389 fix backwards size adjustments. PR libstdc++/78389 *

[Bug rtl-optimization/70710] [5/6 Regression] Compile time hog w/ -O -g -fpeel-loops

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70710 Aldy Hernandez changed: What|Removed |Added CC||aldyh at gcc dot gnu.org

[Bug c++/79101] New: Registers aren't used for passing and returning objects when there is a move constructor

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79101 Bug ID: 79101 Summary: Registers aren't used for passing and returning objects when there is a move constructor Product: gcc Version: 6.3.0 Status: UNCONFIRMED

[Bug tree-optimization/79088] [7 Regression] wrong code at -O2 on x86_64-linux-gnu

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79088 --- Comment #3 from Richard Biener --- Boostrapped/tested on x86_64-unknown-linux-gnu.

[Bug bootstrap/79098] [7 Regression] Failure to bootstrap gcc for powerpc-e500v2-linux-gnuspe target

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79098 Alan Modra changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug c++/79077] [7 regression][new inheriting ctors] bad code for inherited ctor

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79077 Jakub Jelinek changed: What|Removed |Added CC||jakub at gcc dot gnu.org --- Comment #2

[Bug target/78660] [7 Regression] 7.0 bootstrap fail on mips64el-unknow-linux: configure-stage2-target-libgcc' failed

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660 --- Comment #16 from mpf at gcc dot gnu.org --- (In reply to Eric Botcazou from comment #15) > That's incorrect, see what reload1.c:eliminate_regs_1 says about it: > > if (MEM_P (new_rtx) > && ((x_size < new_size >

[Bug regression/53203] [5/6/7 Regression]: gcc.dg/setjmp-1.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53203 Aldy Hernandez changed: What|Removed |Added CC||aldyh at gcc dot gnu.org --- Comment

[Bug bootstrap/79098] [7 Regression] Failure to bootstrap gcc for powerpc-e500v2-linux-gnuspe target

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79098 --- Comment #2 from Alan Modra --- Author: amodra Date: Mon Jan 16 11:12:57 2017 New Revision: 244489 URL: https://gcc.gnu.org/viewcvs?rev=244489=gcc=rev Log: Powerpc bootstrap failure due to duplicate case value PR target/79098

[Bug target/78660] [7 Regression] 7.0 bootstrap fail on mips64el-unknow-linux: configure-stage2-target-libgcc' failed

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660 --- Comment #15 from Eric Botcazou --- > So does LRA generate a full 64-bit load or an extended 32-to-64-bit load? The former it seems, I can see: (insn 218 211 8356 2 (set (reg:SI 4 $4 [2479]) (ne:SI (reg:DI 22 $22 [orig:230 _3 ]

[Bug tree-optimization/77283] [7 Regression] Revision 238005 disables loop unrolling

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77283 Richard Biener changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug tree-optimization/71437] [7 regression] Performance regression after r235817

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71437 --- Comment #5 from amker at gcc dot gnu.org --- (In reply to Richard Biener from comment #4) > With -fwhole-program there's no regression from GCC 6.2 to current trunk. > Without I still can see a small regression (here 0.86s vs 0.92s). > >

[Bug tree-optimization/71437] [7 regression] Performance regression after r235817

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71437 Richard Biener changed: What|Removed |Added Status|ASSIGNED|NEW CC|

[Bug target/78660] [7 Regression] 7.0 bootstrap fail on mips64el-unknow-linux: configure-stage2-target-libgcc' failed

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660 --- Comment #14 from Eric Botcazou --- > Yes, that is true but the upper 32-bits still need to be 'zero'. What > happens later on is that the (subreg:SI (reg:DI 316)) is spilled, spilling > only 32-bits to the stack but it gets reloaded as

[Bug bootstrap/79098] [7 Regression] Failure to bootstrap gcc for powerpc-e500v2-linux-gnuspe target

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79098 Alan Modra changed: What|Removed |Added Status|NEW |ASSIGNED Assignee|unassigned at

[Bug target/78660] [7 Regression] 7.0 bootstrap fail on mips64el-unknow-linux: configure-stage2-target-libgcc' failed

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660 --- Comment #13 from mpf at gcc dot gnu.org --- (In reply to Eric Botcazou from comment #12) > > Maybe the load sign-extends instead of zero-extending as specified > > initially. > > But I'm not sure that this matters here, since: > > (insn 58

[Bug translation/79100] New: Superfluous % in messages from cfgloop.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79100 Bug ID: 79100 Summary: Superfluous % in messages from cfgloop.c Product: gcc Version: 7.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component:

[Bug sanitizer/78887] [7 Regression] Failure to build aarch64 allmodconfig Linux kernel 4.9

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78887 Jakub Jelinek changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/78660] [7 Regression] 7.0 bootstrap fail on mips64el-unknow-linux: configure-stage2-target-libgcc' failed

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78660 --- Comment #12 from Eric Botcazou --- > Maybe the load sign-extends instead of zero-extending as specified initially. But I'm not sure that this matters here, since: (insn 58 57 59 3 (set (subreg:SI (reg:DI 316 [ iftmp.3_114 ]) 0)

[Bug c++/79095] [7 regression] spurious stringop-overflow warning

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79095 Jakub Jelinek changed: What|Removed |Added CC||jakub at gcc dot gnu.org,

[Bug tree-optimization/79054] missing range information with INT_MAX

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79054 Christophe Lyon changed: What|Removed |Added Target|poerpc64*-*-* |powerpc64*-*-* CC|

[Bug tree-optimization/77283] [7 Regression] Revision 238005 disables loop unrolling

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77283 --- Comment #19 from Richard Biener --- Author: rguenth Date: Mon Jan 16 09:33:12 2017 New Revision: 244487 URL: https://gcc.gnu.org/viewcvs?rev=244487=gcc=rev Log: 2017-01-13 Richard Biener PR

[Bug middle-end/79089] [7 Regression] error: incorrect sharing of tree nodes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79089 Jakub Jelinek changed: What|Removed |Added Status|NEW |ASSIGNED Assignee|unassigned

[Bug target/79058] [7 Regression] ARM: internal compiler error: in extract_constrain_insn, at recog.c:2213

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79058 --- Comment #22 from Dominik Vogt --- That looks like a similar problem. I'm lacking some knowledge about how register pairs are allocated for paradoxical subregs on bigendian systems though. Deducing from the code quoted above and from what

[Bug demangler/79099] Memory leak in cplus-dem.c:2232

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79099 Martin Liška changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug c++/71737] [5/6 Regression] ICE following 2x pack expansion in non-pack with template alias

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71737 Paolo Carlini changed: What|Removed |Added Summary|[5/6/7 Regression] ICE |[5/6 Regression] ICE

[Bug c++/71737] [5/6/7 Regression] ICE following 2x pack expansion in non-pack with template alias

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71737 --- Comment #6 from paolo at gcc dot gnu.org --- Author: paolo Date: Mon Jan 16 09:09:30 2017 New Revision: 244486 URL: https://gcc.gnu.org/viewcvs?rev=244486=gcc=rev Log: /c-family 2017-01-16 Paolo Carlini

[Bug bootstrap/79098] [7 Regression] Failure to bootstrap gcc for powerpc-e500v2-linux-gnuspe target

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79098 Markus Trippelsdorf changed: What|Removed |Added Priority|P3 |P1

[Bug bootstrap/79098] [7 Regression] Failure to bootstrap gcc for powerpc-e500v2-linux-gnuspe target

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79098 Markus Trippelsdorf changed: What|Removed |Added Target|powerpc-e500v2-linux-gnuspe |powerpc-e500v2-linux-gnuspe

[Bug lto/79061] [7 Regression][LTO][ASAN] LTO plus ASAN fails with "AddressSanitizer: initialization-order-fiasco"

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79061 --- Comment #9 from Jakub Jelinek --- I think it is fine if it has DECL_NAME NULL, but it would be helpful if DECL_SOURCE_LOCATION of the TRANSLATION_UNIT_DECL was set to some location in the main input file (e.g. first column on first line of

[Bug c++/79091] [7 regression] ICE in write_unnamed_type

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79091 Martin Liška changed: What|Removed |Added CC||jason at gcc dot gnu.org,

[Bug lto/79061] [7 Regression][LTO][ASAN] LTO plus ASAN fails with "AddressSanitizer: initialization-order-fiasco"

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79061 --- Comment #8 from Maxim Ostapenko --- (In reply to Jakub Jelinek from comment #7) > Comment on attachment 40514 [details] > Untested fix 1. > > But DECL_SOURCE_FILE is not the main input file of the TU that contains it, > if e.g. a variable

[Bug tree-optimization/32306] [5/6/7 Regression] redundant && || not eliminated

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=32306 Richard Biener changed: What|Removed |Added Status|WAITING |NEW --- Comment #32 from Richard

[Bug c++/79085] ICE with placement new to unaligned location

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79085 Richard Biener changed: What|Removed |Added Target||arm-none-eabi

[Bug tree-optimization/32199] jc1: out of memory allocating 4072 bytes after a total of 805021000 bytes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=32199 Richard Biener changed: What|Removed |Added Resolution|WORKSFORME |FIXED --- Comment #20 from Richard

<    1   2