[Bug fortran/102826] Glibc "--disable-mathvec" configure option fail to disable traces to libmvec

2021-10-18 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102826 --- Comment #3 from haochen.jiang at intel dot com --- (In reply to Andrew Pinski from comment #2) > math-vector-fortran.h comes from glibc so this is a glibc bug and not a GCC > bug. > installed header files from glibc should match

[Bug fortran/102826] New: Glibc "--disable-mathvec" configure option fail to disable traces to libmvec

2021-10-18 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102826 Bug ID: 102826 Summary: Glibc "--disable-mathvec" configure option fail to disable traces to libmvec Product: gcc Version: 12.0 Status: UNCONFIRMED Severity:

[Bug target/104371] [x86] Failure to use optimize pxor+pcmpeqb+pmovmskb+cmp 0xFFFF pattern to ptest

2022-03-31 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104371 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com ---

[Bug target/111907] ICE: in curr_insn_transform, at lra-constraints.cc:4294 unable to generate reloads for: {*andnottf3} with -mavx512f -mno-evex512

2023-11-06 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111907 --- Comment #6 from Haochen Jiang --- Proposed patch: https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635410.html

[Bug target/112374] [14 Regression] `--with-arch=skylake-avx512 --with-cpu=skylake-avx512` causes a comparison failure

2023-11-07 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112374 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com ---

[Bug target/111889] [14 Regression] 128/256 intrins could not be used with only specifying "no-evex512, avx512vl" in function attribute

2023-11-05 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111889 Haochen Jiang changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/111907] ICE: in curr_insn_transform, at lra-constraints.cc:4294 unable to generate reloads for: {*andnottf3} with -mavx512f -mno-evex512

2023-11-05 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111907 --- Comment #5 from Haochen Jiang --- BTW, it should be disabled since it will use zmm previously. foo(_Float128, _Float128): pushrbp mov rbp, rsp vmovdqa XMMWORD PTR [rbp-16], xmm0 vmovdqa XMMWORD PTR

[Bug target/111907] ICE: in curr_insn_transform, at lra-constraints.cc:4294 unable to generate reloads for: {*andnottf3} with -mavx512f -mno-evex512

2023-11-05 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111907 --- Comment #4 from Haochen Jiang --- I guess it is caused by "*andnot3", not confirmed yet. The isa for the last constraint changed to avx512f_512, which will make the pattern disabled under -mavx512f -mno-evex512. Let me find a solution on

[Bug target/111753] [14 Regression] ICE: in extract_constrain_insn, at recog.cc:2692 insn does not satisfy its constraints: {*movsf_internal} with -O2 -mavx512bw -fno-tree-ter starting with r14-4499

2023-10-18 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111753 --- Comment #3 from Haochen Jiang --- It seems like caused by I changed the behavior when trying to use x/ymm16+ w/o avx512vl specified. Working on a solution for that.

[Bug target/111753] [14 Regression] ICE: in extract_constrain_insn, at recog.cc:2692 insn does not satisfy its constraints: {*movsf_internal} with -O2 -mavx512bw -fno-tree-ter starting with r14-4499

2023-10-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111753 --- Comment #4 from Haochen Jiang --- Proposed patch: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633677.html

[Bug target/111889] [14 Regression] 128/256 intrins could not be used with only specifying "no-evex512, avx512vl" in function attribute

2023-10-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111889 --- Comment #1 from Haochen Jiang --- (In reply to Haochen Jiang from comment #0) > Created attachment 56155 [details] > Simple testcase > > With this simple testcase and command like this: > > x86_64-pc-linux-gnu-gcc -O2 -march=x86-64 1.c >

[Bug target/111889] [14 Regression] 128/256 intrins could not be used with only specifying "no-evex512, avx512vl" in function attribute

2023-10-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111889 --- Comment #2 from Haochen Jiang --- Here is the Godbolt example of that: https://godbolt.org/z/b3n8h4rb1

[Bug target/111889] [14 Regression] 128/256 intrins could not be used with only specifying "no-evex512, avx512vl" in function attribute

2023-10-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111889 --- Comment #3 from Haochen Jiang --- My proposal for this problem is to also push "no-evex512" when defining 128/256 intrins. But I am not sure if there will be some potential problems. Currently working on an experiment on that.

[Bug target/111889] New: [14 Regression] 128/256 intrins could not be used with only specifying "no-evex512, avx512vl" in function attribute

2023-10-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111889 Bug ID: 111889 Summary: [14 Regression] 128/256 intrins could not be used with only specifying "no-evex512, avx512vl" in function attribute Product: gcc

[Bug target/111753] [14 Regression] ICE: in extract_constrain_insn, at recog.cc:2692 insn does not satisfy its constraints: {*movsf_internal} with -O2 -mavx512bw -fno-tree-ter starting with r14-4499

2023-10-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111753 --- Comment #6 from Haochen Jiang --- Fixed on trunk.

[Bug target/111772] ICE on gfortran.dg/transpose_conjg_1.f90 in regrename.cc

2023-10-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111772 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com ---

[Bug target/111889] [14 Regression] 128/256 intrins could not be used with only specifying "no-evex512, avx512vl" in function attribute

2023-10-23 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111889 --- Comment #5 from Haochen Jiang --- It is actually a legacy issue from this: $ cat 2.c #include __attribute__ ((target ("no-avx2"))) void foo () { return _mm_empty (); } $ x86_64-pc-linux-gnu-gcc -O2 -mavx512f 2.c It will also fail.

[Bug target/111051] [14 Regression] highway-1.0.6 fails to build as gcc-14.0.0/lib/gcc/x86_64-unknown-linux-gnu/14.0.0/include/avxintrin.h:1238:1: error: inlining failed in call to 'always_inline' '__

2023-08-18 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111051 --- Comment #3 from Haochen Jiang --- See patch: https://gcc.gnu.org/pipermail/gcc-patches/2023-August/627829.html

[Bug target/111051] [14 Regression] highway-1.0.6 fails to build as gcc-14.0.0/lib/gcc/x86_64-unknown-linux-gnu/14.0.0/include/avxintrin.h:1238:1: error: inlining failed in call to 'always_inline' '__

2023-08-17 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111051 --- Comment #2 from Haochen Jiang --- It is caused by when including immintrin.h, since the pragma is removed, there will be no AVX support, which makes _mm256_setzero_pd invisible. Adding a AVX2 pragma instead of removing it should solve the

[Bug target/104371] [x86] Failure to use optimize pxor+pcmpeqb+pmovmskb+cmp 0xFFFF pattern to ptest

2022-05-12 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104371 --- Comment #8 from Haochen Jiang --- Fixed for GCC 13.

[Bug target/106180] [13 Regression] ICE in extract_insn, at recog.cc:2791 since r13-1418-g73f942c08deef3

2022-07-05 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106180 --- Comment #4 from Haochen Jiang --- Created attachment 53261 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=53261=edit This patch aims to handle memory issue when unpacking in cvtps2pd I am trying to solve this ICE problem with this

[Bug target/43618] Incorrect sse2_cvtX2Y pattern

2022-07-04 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=43618 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com ---

[Bug target/106180] [13 Regression] ICE in extract_insn, at recog.cc:2791 since r13-1418-g73f942c08deef3

2022-07-06 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106180 --- Comment #7 from Haochen Jiang --- (In reply to Uroš Bizjak from comment #6) > Comment on attachment 53261 [details] > This patch aims to handle memory issue when unpacking in cvtps2pd > > >@@ -9270,7 +9270,15 @@ > > (vec_select:V2SF

[Bug target/106180] [13 Regression] ICE in extract_insn, at recog.cc:2791 since r13-1418-g73f942c08deef3

2022-07-06 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106180 --- Comment #8 from Haochen Jiang --- Created attachment 53269 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=53269=edit This patch aims to handle memory issue when unpacking in cvtps2pd (version 2) Just fully tested on this patch.

[Bug target/106180] [13 Regression] ICE in extract_insn, at recog.cc:2791 since r13-1418-g73f942c08deef3

2022-07-06 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106180 --- Comment #9 from Haochen Jiang --- (In reply to Haochen Jiang from comment #8) > Created attachment 53269 [details] > This patch aims to handle memory issue when unpacking in cvtps2pd (version 2) > > Just fully tested on this patch. Changed

[Bug libfortran/108056] [12/13 Regression] backward compatibility issue between 11 and 12

2022-12-15 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108056 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com ---

[Bug fortran/107669] [13 Regression] commit r13-3931 causes lots of testcase failure

2022-11-15 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107669 Haochen Jiang changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug fortran/107669] New: [13 Regression] commit r13-3931-59a63247992eb13153b82c4902aadf111460eac2 causes lots of testcase failure

2022-11-13 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107669 Bug ID: 107669 Summary: [13 Regression] commit r13-3931-59a63247992eb13153b82c4902aadf111460eac2 causes lots of testcase failure Product: gcc Version: 13.0

[Bug middle-end/109118] New: [13 Regression] gcc.dg/mla_1.c failed on target w/o __Uint32x4_t support

2023-03-13 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109118 Bug ID: 109118 Summary: [13 Regression] gcc.dg/mla_1.c failed on target w/o __Uint32x4_t support Product: gcc Version: 13.0 Status: UNCONFIRMED Severity:

[Bug testsuite/108899] [13 Regression] ERROR: can't rename to "saved-unsupported": command already exists on i386

2023-02-23 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108899 --- Comment #9 from Haochen Jiang --- (In reply to Jakub Jelinek from comment #8) > Should be fixed now. Sorry for the late reply. Yes, it fixed for me now. Thx a lot!

[Bug testsuite/108898] [13 Regression] Test introduced by r13-6278-g3da77f217c8b2089ecba3eb201e727c3fcdcd19d failed on i386

2023-02-23 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108898 --- Comment #2 from Haochen Jiang --- (In reply to Andrew Stubbs from comment #1) > I tested it on i686-pc-linux-gnu before I posted the patch, and it was > working then. Can you be more specific what configuration you were testing, > please?

[Bug testsuite/108898] New: [13 Regression] Test introduced by r13-6278-g3da77f217c8b2089ecba3eb201e727c3fcdcd19d failed on i386

2023-02-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108898 Bug ID: 108898 Summary: [13 Regression] Test introduced by r13-6278-g3da77f217c8b2089ecba3eb201e727c3fcdcd19d failed on i386 Product: gcc Version: 13.0

[Bug testsuite/108899] New: [13 Regression] ERROR: can't rename to "saved-unsupported": command already exists on i386

2023-02-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108899 Bug ID: 108899 Summary: [13 Regression] ERROR: can't rename to "saved-unsupported": command already exists on i386 Product: gcc Version: 13.0 Status: UNCONFIRMED

[Bug target/109549] New: [14 Regression] cmov6.c test fail after commit r14-53-g675b1a7f113adb1d737adaf78b4fd90be7a0ed1a

2023-04-19 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109549 Bug ID: 109549 Summary: [14 Regression] cmov6.c test fail after commit r14-53-g675b1a7f113adb1d737adaf78b4fd90be7a0ed1a Product: gcc Version: 14.0 Status: UNCONFIRMED

[Bug testsuite/109596] New: [14 Regression] Lots of testcases fails on x86_64 after r14-162-gcda246f8b421ba

2023-04-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109596 Bug ID: 109596 Summary: [14 Regression] Lots of testcases fails on x86_64 after r14-162-gcda246f8b421ba Product: gcc Version: 14.0 Status: UNCONFIRMED

[Bug target/110083] New: [14 Regression] ICEs for testcase on fp-int-convert*timode after r14-1466-g3635e8c67e1

2023-06-01 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110083 Bug ID: 110083 Summary: [14 Regression] ICEs for testcase on fp-int-convert*timode after r14-1466-g3635e8c67e1 Product: gcc Version: 14.0 Status: UNCONFIRMED

[Bug target/109807] New: [14 Regression] sse2-mmx-pmaddwd.c met ICE after commit gcc-14-666-g608e7f3ab47 with march=cascadelake

2023-05-11 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109807 Bug ID: 109807 Summary: [14 Regression] sse2-mmx-pmaddwd.c met ICE after commit gcc-14-666-g608e7f3ab47 with march=cascadelake Product: gcc Version: 14.0 Status:

[Bug target/109807] [14 Regression] sse2-mmx-pmaddwd.c met ICE after commit r14-666-g608e7f3ab47 with march=cascadelake

2023-05-11 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109807 --- Comment #1 from Haochen Jiang --- I further checked the reason, V2SI should never dropped into that function because we have no pattern under V2SI. I suppose it is because -march=cascadelake will open SSE4.1, with the new pattern, it

[Bug target/109807] [14 Regression] sse2-mmx-pmaddwd.c met ICE after commit r14-666-g608e7f3ab47 with march=cascadelake

2023-05-11 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109807 --- Comment #4 from Haochen Jiang --- (In reply to Uroš Bizjak from comment #2) > (In reply to Haochen Jiang from comment #1) > > I further checked the reason, V2SI should never dropped into that function > > because we have no pattern under

[Bug target/113133] [14 Regression] ICE: SIGSEGV in mark_label_nuses(rtx_def*) (emit-rtl.cc:3896) with -O -fno-tree-ter -mavx512f -march=barcelona

2023-12-28 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113133 --- Comment #5 from Haochen Jiang --- (In reply to Uroš Bizjak from comment #3) > This patch also fixes the failure: > > --cut here-- > diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md > index ca6dbf42a6d..cdb9ddc4eb3 100644 >

[Bug target/113133] [14 Regression] ICE: SIGSEGV in mark_label_nuses(rtx_def*) (emit-rtl.cc:3896) with -O -fno-tree-ter -mavx512f -march=barcelona

2023-12-28 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113133 --- Comment #6 from Haochen Jiang --- Aha, I see what happened. x/ymm16+ are usable for AVX512F w/o AVX512VL and that is why I added that to allow them. Let me find a way to see if we can fix this.

[Bug target/113133] [14 Regression] ICE: SIGSEGV in mark_label_nuses(rtx_def*) (emit-rtl.cc:3896) with -O -fno-tree-ter -mavx512f -march=barcelona

2023-12-28 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113133 --- Comment #7 from Haochen Jiang --- (In reply to Uroš Bizjak from comment #1) > Created attachment 56962 [details] > Proposed patch > > Patch in testing. > > lowpart_subreg can't handle: > > lowpart_subreg (V4SFmode, operands[0], DFmode);

[Bug target/113133] [14 Regression] ICE: SIGSEGV in mark_label_nuses(rtx_def*) (emit-rtl.cc:3896) with -O -fno-tree-ter -mavx512f -march=barcelona

2024-01-01 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113133 --- Comment #11 from Haochen Jiang --- I just checked the code and pattern. I suppose the simple remove is reasonable here. We should only allow x/ymm16+ for scalar instructions, but not this pattern.

[Bug target/113288] [i386] Missing #define for -mavx10.1-256 and -mavx10.1-512

2024-01-08 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113288 --- Comment #1 from Haochen Jiang --- (In reply to Tobias Burnus from comment #0) > As noted in > https://gcc.gnu.org/pipermail/gcc-patches/2024-January/642025.html > > There is not #define for -mavx10.1-256 and -mavx10.1-512 > > By contrast,

[Bug target/113288] [i386] Missing #define for -mavx10.1-256 and -mavx10.1-512

2024-01-08 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113288 --- Comment #3 from Haochen Jiang --- Adding them are quite straightforward. But I am not quite sure how the whole libgomp patch works. Is the patch attempt to check whether it is a perfect match for each ISA detected from a hardware? If that

[Bug target/113288] [i386] Missing #define for -mavx10.1-256 and -mavx10.1-512

2024-01-11 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113288 --- Comment #6 from Haochen Jiang --- Fixed on trunk.

[Bug target/112675] New: [14 Regression] r14-5385-g0a140730c97087 caused regression on testcases

2023-11-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112675 Bug ID: 112675 Summary: [14 Regression] r14-5385-g0a140730c97087 caused regression on testcases Product: gcc Version: 14.0 Status: UNCONFIRMED Severity:

[Bug target/112643] [14 regression] including x86intrin.h is broken for -march=native (which adds -mno-avx10.1-256 )

2023-11-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112643 --- Comment #24 from Haochen Jiang --- Patch aims to fix that: https://gcc.gnu.org/pipermail/gcc-patches/2023-November/637865.html

[Bug target/112675] [14 Regression] r14-5385-g0a140730c97087 caused regression on testcases for i386

2023-11-26 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112675 Haochen Jiang changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/113534] New: printf might report segmentation fault under -mabi=ms

2024-01-21 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113534 Bug ID: 113534 Summary: printf might report segmentation fault under -mabi=ms Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3

[Bug target/113656] [x86] ICE in simplify_const_unary_operation, at simplify-rtx.cc:1954 with new -mavx10.1

2024-01-29 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113656 --- Comment #3 from Haochen Jiang --- (In reply to Haochen Jiang from comment #2) > Actually it is caused by option -funsafe-math-optimizations but not > -mavx10.1. > > Before my commit, while using option: > > -frounding-math -O3

[Bug target/113656] [x86] ICE in simplify_const_unary_operation, at simplify-rtx.cc:1954 with new -mavx10.1

2024-01-29 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113656 --- Comment #2 from Haochen Jiang --- Actually it is caused by option -funsafe-math-optimizations but not -mavx10.1. Before my commit, while using option: -frounding-math -O3 -mavx512fp16 -mavx512vl -funsafe-math-optimizations It will also

[Bug target/113656] [x86] ICE in simplify_const_unary_operation, at simplify-rtx.cc:1954 with new -mavx10.1

2024-01-29 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113656 --- Comment #1 from Haochen Jiang --- >From the first glance, it seems that the op here is wrongly interpreted. Investigating why.

[Bug target/113656] [x86] ICE in simplify_const_unary_operation, at simplify-rtx.cc:1954 with new -mavx10.1

2024-01-30 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113656 Haochen Jiang changed: What|Removed |Added CC||crazylht at gmail dot com --- Comment

[Bug target/112547] 9% exec time regression of 462.libquantum SPEC on AMD zen4 CPU

2023-11-15 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112547 --- Comment #2 from Haochen Jiang --- It is weird since I did not touch the tune. Need a bisect to check that but I do not have a zen4 machine. Could you try with this commit g:459866eaeec151e72aecd670695f014f4ec48588 to see if the regression

[Bug target/112547] 9% exec time regression of 462.libquantum SPEC on AMD zen4 CPU

2023-11-15 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112547 --- Comment #3 from Haochen Jiang --- (In reply to Haochen Jiang from comment #2) > It is weird since I did not touch the tune. > > Need a bisect to check that but I do not have a zen4 machine. > > Could you try with this commit

[Bug target/112547] 9% exec time regression of 462.libquantum SPEC on AMD zen4 CPU

2023-11-15 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112547 --- Comment #4 from Haochen Jiang --- I checked the znver3 plot on the site, it seems that no regression occurs. Since znver4 enabled AVX512, that is the reason why I guessed previously. Could you also provide the option you ran with? I could

[Bug target/112547] 9% exec time regression of 462.libquantum SPEC on AMD zen4 CPU

2023-11-16 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112547 --- Comment #7 from Haochen Jiang --- I have got a same binary w/ and w/o my commit with the options if nothing went wrong. Seems we need more investigation.

[Bug target/111907] ICE: in curr_insn_transform, at lra-constraints.cc:4294 unable to generate reloads for: {*andnottf3} with -mavx512f -mno-evex512

2023-11-07 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111907 --- Comment #8 from Haochen Jiang --- Should be fixed on trunk now.

[Bug target/112435] [14 regression] GCC generates assembly which gas rejects with AVX when building ncnn (Error: unsupported instruction `vblendps') since r14-96-gc2dac2e5fbbcdd

2023-11-07 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112435 --- Comment #12 from Haochen Jiang --- Seems like we should prevent the optimization in that commit to register x/ymm16+.

[Bug bootstrap/112643] [14 regression] failure to build libitm with --disable-bootstrap after r14-5607-g2f8f7ee2db82a3

2023-11-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112643 --- Comment #10 from Haochen Jiang --- (In reply to Andrew Pinski from comment #7) > I suspect the common theme here is enable-default-pie . > > In the case of the original report was built with a compiler that had > enabled and

[Bug bootstrap/112643] Failure to build libitm with --disable-bootstrap after r14-5607-g2f8f7ee2db82a3

2023-11-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112643 --- Comment #4 from Haochen Jiang --- It is weird since everything passed even under bootstrap. Could you provide the exact options you build GCC with --disable-bootstrap for me to reproduce? I suppose all of them are '--enable-libsanitizer'

[Bug bootstrap/112643] [14 regression] failure to build libitm with --disable-bootstrap after r14-5607-g2f8f7ee2db82a3

2023-11-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112643 --- Comment #14 from Haochen Jiang --- Intel(R) Core(TM) i5-8250U and AMD Ryzen 7 PRO 6850U both have AVX. I am trying to reproduce that on building trunk with GCC 13.

[Bug bootstrap/112643] [14 regression] failure to build libitm with --disable-bootstrap after r14-5607-g2f8f7ee2db82a3

2023-11-21 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112643 --- Comment #16 from Haochen Jiang --- Well I still could not reproduce that. Need some more investigation if they are the same case.

[Bug target/112643] [14 regression] including x86intrin.h is broken for -march=native (which adds -mno-avx10.1-256 )

2023-11-21 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112643 --- Comment #21 from Haochen Jiang --- (In reply to Andrew Pinski from comment #20) > The use of __builtin_ia32_2intersectd128 in avx512vp2intersectvlintrin.h has: > #pragma GCC target("avx512vp2intersect,avx512vl,no-evex512") > > While

[Bug target/112643] [14 regression] including x86intrin.h is broken for -march=native (which adds -mno-avx10.1-256 )

2023-11-21 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112643 --- Comment #22 from Haochen Jiang --- A quick workaround would be not appending -mno-avx10.1-xxx into -march=native. And it should work after my experiment. However, I am finding a better way to do that. The real problem seems like the AVX10

[Bug target/112643] [14 regression] including x86intrin.h is broken for -march=native (which adds -mno-avx10.1-256 )

2023-11-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112643 --- Comment #23 from Haochen Jiang --- I have root caused the issue and also discovered some other minor problems unrelated to this PR but hard to discover. I will write a patch to fix all of them.

[Bug tree-optimization/114238] [14 regression] Multiple 554.roms_r run-time regressions (4%-20%) since r14-9193-ga0b1798042d033

2024-03-12 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114238 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com ---

[Bug testsuite/109596] [14 Regression] Lots of guality testcase fails on x86_64 after r14-162-gcda246f8b421ba

2024-04-13 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109596 --- Comment #18 from Haochen Jiang --- (In reply to Andrew Pinski from comment #16) > (In reply to Carlos Eduardo Seo from comment #15) > > I see some failures after this patch on aarch64-linux-gnu: > > > > FAIL: gcc.dg/guality/pr54693-2.c -O2

[Bug target/110621] x86_64: Test gcc.target/i386/pr105354-2.c fails with -fstack-protector

2024-04-26 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110621 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com ---

[Bug target/114987] [14/15 Regression] floating point vector regression, x86, between gcc 14 and gcc-13 using -O3 and target clones on skylake platforms

2024-05-10 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114987 --- Comment #5 from Haochen Jiang --- What I have found is that the binary built with GCC13 and GCC14 will regress on Cascadelake and Skylake. But when I copied the binary to Icelake, it won't. Seems Icelake might fix this with micro-tuning.

[Bug target/114987] [14/15 Regression] floating point vector regression, x86, between gcc 14 and gcc-13 using -O3 and target clones on skylake platforms

2024-05-10 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114987 --- Comment #7 from Haochen Jiang --- Furthermore, when I build with GCC11, the codegen is much better: vaddps 0xc0(%rsp),%ymm5,%ymm2 vaddps 0xe0(%rsp),%ymm4,%ymm1 vmovaps %ymm2,0x80(%rsp)

[Bug target/115002] [14/15 regression] wide integer vector performance regression, x86, between gcc-14 and gcc-13 using target clones on skylake platform

2024-05-14 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115002 --- Comment #5 from Haochen Jiang --- It seems that mainly caused by codesize increase in GCC14 since the actual instruction retired increase ratio is similar to the regression. Also, just like PR114987, I tried with GCC11, seems it gets the

[Bug target/115071] performance regression, x86, between gcc-14 and gcc-13 using -O3 and _Pragma("GCC unroll 4") on skylake

2024-05-15 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115071 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com ---

[Bug target/115069] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-15 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com ---

[Bug target/115028] [15 regression] gcc.target/i386/pr101950-2.c FAILs

2024-05-15 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115028 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com ---

[Bug target/115025] [14/15 regression] prime computation performance regression, x86, between gcc-14 and gcc-13 on skylake platform

2024-05-16 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115025 --- Comment #5 from Haochen Jiang --- My guess is that for the prime judging loop: for (i = 5; i < max; i += 6) if ((n % i == 0) || (n % (i + 2) == 0)) return 0; In GCC13, it extracts the first

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-17 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #6 from Haochen Jiang --- (In reply to Hongtao Liu from comment #5) > (In reply to Krzysztof Kanas from comment #4) > > I bisected the issue and it seems that commit > > 0368fc54bc11f15bfa0ed9913fd0017815dfaa5d introduces

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-17 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #10 from Haochen Jiang --- A patch like Comment 8 could definitely solve the problem. But I need to test more benchmarks to see if there is surprise. But, yes, as Uros said in Comment 9, maybe there is a chance we could do it

[Bug target/115025] [14/15 regression] prime computation performance regression, x86, between gcc-14 and gcc-13 on skylake platform

2024-05-22 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115025 Haochen Jiang changed: What|Removed |Added CC||jh at suse dot cz --- Comment #6 from

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-19 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #12 from Haochen Jiang --- (In reply to Hongtao Liu from comment #11) > (In reply to Haochen Jiang from comment #10) > > A patch like Comment 8 could definitely solve the problem. But I need to > > test more benchmarks to see if

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #15 from Haochen Jiang --- I am doing like this way. Suppose should be same as Comment 8. diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index a6132911e6a..1e8334877d6 100644 ---

[Bug target/115024] [14/15 regression] 128 bit division performance regression, x86, between gcc-14 and gcc-13 using target clones on skylake platform

2024-05-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115024 Haochen Jiang changed: What|Removed |Added CC||haochen.jiang at intel dot com ---

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #19 from Haochen Jiang --- (In reply to Haochen Jiang from comment #18) > SPEC SPEC seems all same binary to me. So there is no surprise. I suppose let's go with patch from Uros to just emphasize the problem.

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-20 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #18 from Haochen Jiang --- SPEC

[Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform

2024-05-21 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069 --- Comment #22 from Haochen Jiang --- Fixed in GCC14 and GCC15

[Bug middle-end/115208] New: [15 Regression] Memory consumption get extremely high after r15-809

2024-05-24 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115208 Bug ID: 115208 Summary: [15 Regression] Memory consumption get extremely high after r15-809 Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal

[Bug middle-end/115208] [15 Regression] Memory consumption get extremely high after r15-809

2024-05-24 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115208 --- Comment #1 from Haochen Jiang --- Forgot to mention, the memory consumption collection is collected on x86_64 target in order to get the test finished. Therefore, we could debug on x86_64.

[Bug tree-optimization/115208] [15 Regression] Memory consumption get extremely high after r15-807-gfae5e6a4dfcf92

2024-05-26 Thread haochen.jiang at intel dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115208 Haochen Jiang changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---