https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85658
Richard Earnshaw changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85658
--- Comment #6 from Richard Earnshaw ---
Author: rearnsha
Date: Tue May 8 10:33:33 2018
New Revision: 260034
URL: https://gcc.gnu.org/viewcvs?rev=260034&root=gcc&view=rev
Log:
[arm] PR target/85658 Fix operator precedence errors in parsecpu.awk
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85658
--- Comment #5 from Richard Earnshaw ---
Author: rearnsha
Date: Tue May 8 10:21:34 2018
New Revision: 260032
URL: https://gcc.gnu.org/viewcvs?rev=260032&root=gcc&view=rev
Log:
[arm] PR target/85658 Fix operator precedence errors in parsecpu.awk
|unassigned at gcc dot gnu.org |rearnsha at gcc dot
gnu.org
--- Comment #4 from Richard Earnshaw ---
Mine. There are other cases where the precedence is wrong as well. Working on
a patch
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81647
Richard Earnshaw changed:
What|Removed |Added
Target Milestone|--- |7.4
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82989
Richard Earnshaw changed:
What|Removed |Added
Target Milestone|7.4 |6.5
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84208
Richard Earnshaw changed:
What|Removed |Added
Status|WAITING |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84241
Richard Earnshaw changed:
What|Removed |Added
CC||jgreenhalgh at gcc dot gnu.org
--- Co
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84242
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82518
--- Comment #22 from Richard Earnshaw ---
(In reply to Nick Clifton from comment #21)
> Hi Aldy,
>
> >>> instruction. :-( Looking at the code in Handle_Store_Double() in
> >>> sim/arm/armemu.c, I think that the reason is probably because the a
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82518
--- Comment #16 from Richard Earnshaw ---
(In reply to Nick Clifton from comment #13)
> Hi Aldy,
>
>
> > pc: 8ca4, instr: e1c520fc
> > pc: 4, instr: ea00089b
> >
> > I took a peek at the executable being run with "/my-arm-build/objdudump -D
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83370
Richard Earnshaw changed:
What|Removed |Added
Target Milestone|--- |6.5
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83370
Richard Earnshaw changed:
What|Removed |Added
Status|RESOLVED|REOPENED
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641
--- Comment #26 from Richard Earnshaw ---
(In reply to Arnd Bergmann from comment #25)
> or to apply more force and add the ".arch" to each inline
> asm individually.
No, that would not be guaranteed to be supported: and you'd be lying to the
c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84129
Richard Earnshaw changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641
--- Comment #18 from Richard Earnshaw ---
(In reply to Arnd Bergmann from comment #14)
> It looks like r255468 broke compilation of a couple of files in the Linux
> kernel,
> which use a top-level statement like
>
> linux/arch/arm/kvm/hyp/banked
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78809
--- Comment #27 from Richard Earnshaw ---
(In reply to Qing Zhao from comment #23)
> qinzhao@gcc116:~/Bugs/78809/const_cmp$ cat t_p.c
> #include
>
> char array[]= "fishi";
>
> #define NUM 10
> int __attribu
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83712
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |WAITING
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83514
--- Comment #2 from Richard Earnshaw ---
> will *always* construct a -march string for the driver
^^
for the compiler proper
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83514
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83462
--- Comment #3 from Richard Earnshaw ---
(In reply to Jakub Jelinek from comment #1)
> Does arm-none-eabi imply -ffreestanding or something similar? The testcase
> certainly completely fails with -ffreestanding on x86_64-linux.
No. But it's no
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83105
--- Comment #5 from Richard Earnshaw ---
Fixed. We now select ARM10E as the default CPU when --with-float={hard,softfp}
is specified.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83105
--- Comment #4 from Richard Earnshaw ---
Author: rearnsha
Date: Wed Dec 20 10:30:00 2017
New Revision: 255858
URL: https://gcc.gnu.org/viewcvs?rev=255858&root=gcc&view=rev
Log:
[arm] PR target/83105: Minor change of default CPU for arm-linux-gnu
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83105
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83105
--- Comment #2 from Richard Earnshaw ---
The baseline target CPU for arm linux is ARM10TDMI (armv5t), but that processor
only had VFPv1 and GCC has never supported that. Code generated historically
was incompatible with that target and if you ra
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83206
--- Comment #19 from Richard Earnshaw ---
-m{cpu,tune,arch}=native are hosted-only flags that mean look-up the
architecture on the machine I'm running on now. They are not supported at all
on cross compilers. This is translated by the driver in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83206
--- Comment #17 from Richard Earnshaw ---
Author: rearnsha
Date: Fri Dec 8 11:19:20 2017
New Revision: 255504
URL: https://gcc.gnu.org/viewcvs?rev=255504&root=gcc&view=rev
Log:
[arm] PR target/83206: Make native driver select fp-capable armv6 c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83206
Richard Earnshaw changed:
What|Removed |Added
Status|RESOLVED|NEW
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83206
--- Comment #8 from Richard Earnshaw ---
(In reply to Andrew Roberts from comment #7)
> I get the same thing if I just use -mcpu=native:
>
> /usr/local/gcc/bin/gcc -o matrix-v6 -mcpu=native -mfpu=auto -O3 matrix.c
> cc1: error: -mfloat-abi=hard:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83206
--- Comment #6 from Richard Earnshaw ---
> /usr/local/gcc/bin/gcc -o matrix-v6 -march=native -mcpu=native -mtune=native
> -mfpu=auto -O3 matrix.c
> cc1: error: -mfloat-abi=hard: selected processor lacks an FPU
-mcpu=... is an alias that sets bo
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83206
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Version|8.0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641
Richard Earnshaw changed:
What|Removed |Added
Target Milestone|--- |8.0
Severity|normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71942
Richard Earnshaw changed:
What|Removed |Added
CC||mikael.rosbacke at gmail dot
com
---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82871
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641
--- Comment #6 from Richard Earnshaw ---
(In reply to Tamar Christina from comment #5)
> My patch adds support for
>
>
> ```
> #pragma GCC push_options
> #pragma GCC target("arch=armv8-a+crc")
> __attribute__((target("arch=armv8-a+crc"))) uint
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78809
--- Comment #12 from Richard Earnshaw ---
(In reply to Qing Zhao from comment #7)
> on the other hand, memcmp will NOT early stop, it will compare exactly N
> bytes of both buffers. As a result, the compiler can compare multiple bytes
> at one ti
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641
--- Comment #2 from Richard Earnshaw ---
ARMv8-a is the only architecture variant where the CRC extension is optional.
In later variants it is enabled by default; in earlier versions of the
architecture it doesn't exist.
Your report lacks a tes
gcc dot gnu.org|unassigned at gcc dot
gnu.org
--- Comment #4 from Richard Earnshaw ---
I'm clearly not working this one...
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82445
Richard Earnshaw changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82445
--- Comment #7 from Richard Earnshaw ---
Author: rearnsha
Date: Thu Oct 19 13:14:55 2017
New Revision: 253891
URL: https://gcc.gnu.org/viewcvs?rev=253891&root=gcc&view=rev
Log:
[ARM] PR 82445 - suppress 32-bit aligned ldrd/strd peepholing with
-
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82445
--- Comment #8 from Richard Earnshaw ---
Author: rearnsha
Date: Thu Oct 19 13:16:42 2017
New Revision: 253892
URL: https://gcc.gnu.org/viewcvs?rev=253892&root=gcc&view=rev
Log:
[ARM] PR 82445 - suppress 32-bit aligned ldrd/strd peepholing with
-
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82445
--- Comment #6 from Richard Earnshaw ---
Author: rearnsha
Date: Thu Oct 19 13:10:42 2017
New Revision: 253890
URL: https://gcc.gnu.org/viewcvs?rev=253890&root=gcc&view=rev
Log:
[ARM] PR 82445 - suppress 32-bit aligned ldrd/strd peepholing with
-
|unassigned at gcc dot gnu.org |rearnsha at gcc dot
gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82445
--- Comment #4 from Richard Earnshaw ---
looks like gen_operands_ldrd_strd should be checking for this and failing if
the alignment is not suitable for the target architecture.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82440
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82175
--- Comment #11 from Richard Earnshaw ---
I've looked into this, I don't think there's anything to worry about. The
printed options seem to take some of the command-line and other option
processing into account before printing out the results, s
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82175
--- Comment #7 from Richard Earnshaw ---
(In reply to Andrew Roberts from comment #6)
> Thanks Richard, this is now ok, tested on armv7 and aarch64.
>
> However I do see differences in what is selected by march=native on arm
> between 7.2.0 and
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82175
Richard Earnshaw changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82175
--- Comment #4 from Richard Earnshaw ---
Author: rearnsha
Date: Tue Sep 26 09:33:49 2017
New Revision: 253189
URL: https://gcc.gnu.org/viewcvs?rev=253189&root=gcc&view=rev
Log:
[ARM] PR82175 - fix -mcpu=native not working correctly.
The new opt
||2017-09-25
Assignee|unassigned at gcc dot gnu.org |rearnsha at gcc dot
gnu.org
Ever confirmed|0 |1
--- Comment #3 from Richard Earnshaw ---
Mine
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81907
--- Comment #14 from Richard Earnshaw ---
(In reply to dongkyun.s from comment #13)
> > Confirmed the call on 6.4.1 but GCC 7 and trunk don't generate the call for
> > -mcpu=cortex-a9 .
>
> I also verified memset call is not generated with GCC
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81818
--- Comment #9 from Richard Earnshaw ---
(In reply to Andrew Roberts from comment #8)
> I've tried building gcc-8-20170806 and gcc-8-20170813 with
> --enable-gather-detailed-mem-stats
>
> This fails on x86-64, arm and aarch64 with the same error
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81720
Richard Earnshaw changed:
What|Removed |Added
Resolution|INVALID |WONTFIX
--- Comment #5 from Richard E
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=40836
Richard Earnshaw changed:
What|Removed |Added
Status|WAITING |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78449
Richard Earnshaw changed:
What|Removed |Added
Target Milestone|--- |7.0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81356
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81273
Richard Earnshaw changed:
What|Removed |Added
Status|WAITING |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81273
--- Comment #4 from Richard Earnshaw ---
(In reply to LdB from comment #3)
> I am stunned you could not build the code the only requirement is you
> include the stdint.h so the uint32_t types are defined. I will fix the typos
> are you really say
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81229
Richard Earnshaw changed:
What|Removed |Added
CC||nathan at acm dot org
--- Comment #4
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81168
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=16996
Bug 16996 depends on bug 11824, which changed state.
Bug 11824 Summary: [ARM] Parameter passing via stack could be improved
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=11824
What|Removed |Added
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=11824
Richard Earnshaw changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53664
Richard Earnshaw changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=45886
Richard Earnshaw changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=45886
--- Comment #6 from Richard Earnshaw ---
Closing. All versions of gcc since 4.6 have supported __ARM_PCS_VFP. Older
versions are no-longer maintained.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46128
Richard Earnshaw changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80754
Richard Earnshaw changed:
What|Removed |Added
CC||rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80627
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80627
Richard Earnshaw changed:
What|Removed |Added
Resolution|FIXED |INVALID
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80627
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80530
Richard Earnshaw changed:
What|Removed |Added
Keywords||ice-on-valid-code
Status|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80530
--- Comment #4 from Richard Earnshaw ---
Author: rearnsha
Date: Thu Apr 27 14:11:47 2017
New Revision: 247341
URL: https://gcc.gnu.org/viewcvs?rev=247341&root=gcc&view=rev
Log:
[AArch64] Fix for gcc-7 regression PR 80530
This patch fixes the r
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80530
--- Comment #3 from Richard Earnshaw ---
Author: rearnsha
Date: Thu Apr 27 14:09:55 2017
New Revision: 247340
URL: https://gcc.gnu.org/viewcvs?rev=247340&root=gcc&view=rev
Log:
[AArch64] Fix for gcc-7 regression PR 80530
This patch fixes the r
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80530
Richard Earnshaw changed:
What|Removed |Added
Target||aarch64
Status|UNCONFIRME
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
Richard Earnshaw changed:
What|Removed |Added
CC||biblbroks at hotmail dot com
--- Comm
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69841
Richard Earnshaw changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80149
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
Richard Earnshaw changed:
What|Removed |Added
CC||klug.stefan at gmx dot de
--- Comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
--- Comment #51 from Richard Earnshaw ---
(In reply to Jonathan Wakely from comment #50)
> (In reply to ktkachov from comment #3)
> > Started with r225465.
> > Something to do with alignment.
> > I wonder if it's related to PR69841 ?
>
> Seems t
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
--- Comment #43 from Richard Earnshaw ---
Hmm, so how about just inserting the warning in the broken compilers?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
--- Comment #40 from Richard Earnshaw ---
(In reply to Jakub Jelinek from comment #39)
> It is an ABI change, so I think it is highly undesirable to backport. It is
> enough that people will have to rebuild many packages built by GCC 7
> prerele
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80389
Richard Earnshaw changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80389
--- Comment #5 from Richard Earnshaw ---
Author: rearnsha
Date: Tue Apr 11 14:57:41 2017
New Revision: 246843
URL: https://gcc.gnu.org/viewcvs?rev=246843&root=gcc&view=rev
Log:
[arm] PR 80389 - if architecture and cpu mismatch, don't print an ar
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80389
Richard Earnshaw changed:
What|Removed |Added
Assignee|unassigned at gcc dot gnu.org |rearnsha at gcc dot
gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80389
Richard Earnshaw changed:
What|Removed |Added
Priority|P1 |P2
Status|UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80239
--- Comment #2 from Richard Earnshaw ---
is the diff you show backwards? Otherwise the new code looks distinctly
better.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80052
Richard Earnshaw changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80052
--- Comment #2 from Richard Earnshaw ---
Author: rearnsha
Date: Fri Mar 17 17:05:23 2017
New Revision: 246229
URL: https://gcc.gnu.org/viewcvs?rev=246229&root=gcc&view=rev
Log:
[aarch64] Fix typo in aarch64.opt (dummping -> dumping).
PR
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80082
Richard Earnshaw changed:
What|Removed |Added
Summary|[6/7 regression] GCC|[5/6/7 regression] GCC
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80082
Richard Earnshaw changed:
What|Removed |Added
Summary|GCC incorrectly assumes |[6/7 regression] GCC
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80082
Richard Earnshaw changed:
What|Removed |Added
Keywords||wrong-code
Target|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69008
--- Comment #6 from Richard Earnshaw ---
(In reply to Marc Mutz from comment #5)
> Why is this only "missed-optimization"? Don't these architecture's ABIs
> stipulate passing in registers, as well as the Itanium ABI? So why is this
> not a platfo
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79868
--- Comment #3 from Richard Earnshaw ---
Both pragma and attribute are keywords in the language. If the substituted
value were placed in quotes, would that help?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79784
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |WAITING
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79742
Richard Earnshaw changed:
What|Removed |Added
Assignee|rearnsha at gcc dot gnu.org|unassigned at gcc dot
gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79742
--- Comment #4 from Richard Earnshaw ---
Author: rearnsha
Date: Tue Feb 28 14:17:29 2017
New Revision: 245775
URL: https://gcc.gnu.org/viewcvs?rev=245775&root=gcc&view=rev
Log:
[ARM] Fix PR79742 incorrect scheduler choice.
Due to an oversight,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79742
--- Comment #3 from Richard Earnshaw ---
OK the problem occurs when we have a cpu which specifies using the scheduler
for another CPU. The tune-for entry is ignored in this case.
Patch in testing.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79742
--- Comment #2 from Richard Earnshaw ---
(In reply to ktkachov from comment #1)
> Confirmed.
I'm somewhat surprised if those changes have caused this, the generated file
arm-tune.md has no content changes (only modifications to generated comment
: normal
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: rearnsha at gcc dot gnu.org
CC: vmakarov at gcc dot gnu.org
Target Milestone: ---
Target: arm
Created attachment 40799
--> ht
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79131
--- Comment #14 from Richard Earnshaw ---
(In reply to Andreas Krebbel from comment #12)
> Starting with that patch we see worse code being generated for:
>
> int __attribute__((noinline,noclone))
> all_eq_double (double __attribute__((vector_s
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