[Bug target/97802] New: [AArch64] Incorrect documentation for Arm64 NEON

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97802 Bug ID: 97802 Summary: [AArch64] Incorrect documentation for Arm64 NEON Product: gcc Version: unknown Status: UNCONFIRMED Severity: normal Priority: P3

[Bug target/98877] New: [AArch64] Inefficient code generated for tbl NEON intrinsics

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98877 Bug ID: 98877 Summary: [AArch64] Inefficient code generated for tbl NEON intrinsics Product: gcc Version: 11.0 Status: UNCONFIRMED Severity: normal

[Bug c++/99012] gcc-8.4.0 on aarch64 hits internal error during RTL pass: expand if `std::copysign` is used

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99012 Sebastian Pop changed: What|Removed |Added CC||spop at gcc dot gnu.org --- Comment #2

[Bug c++/99012] gcc-8.4.0 on aarch64 hits internal error during RTL pass: expand if `std::copysign` is used

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99012 --- Comment #3 from Sebastian Pop --- I do not see the bug with today's cc1plus from origin/releases/gcc-8

[Bug rtl-optimization/99346] New: [aarch64] ICE in gen_rtx_SUBREG, at emit-rtl.c:1021

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99346 Bug ID: 99346 Summary: [aarch64] ICE in gen_rtx_SUBREG, at emit-rtl.c:1021 Product: gcc Version: 8.4.1 Status: UNCONFIRMED Severity: normal Priority: P3

[Bug target/105162] New: [AArch64] outline-atomics drops dmb ish barrier on __sync builtins

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105162 Bug ID: 105162 Summary: [AArch64] outline-atomics drops dmb ish barrier on __sync builtins Product: gcc Version: unknown Status: UNCONFIRMED Severity: normal

[Bug target/105162] [AArch64] outline-atomics drops dmb ish barrier on __sync builtins

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105162 --- Comment #1 from Sebastian Pop --- Also happens when compiling with LSE: -march=armv8.1-a or later.

[Bug target/105162] [AArch64] outline-atomics drops dmb ish barrier on __sync builtins

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105162 --- Comment #2 from Sebastian Pop --- Created attachment 52750 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=52750=edit patch Fix.

[Bug target/105162] [AArch64] outline-atomics drops dmb ish barrier on __sync builtins

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105162 Sebastian Pop changed: What|Removed |Added Attachment #52750|0 |1 is obsolete|

[Bug target/105162] [AArch64] outline-atomics drops dmb ish barrier on __sync builtins

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105162 --- Comment #4 from Sebastian Pop --- The attached patch degrades performance on cpus with LSE: the barrier is not needed when outline-atomics execute an LSE instruction. I was thinking to add the barrier to the armv8.0 generic path (no LSE)

[Bug target/105162] [AArch64] outline-atomics drops dmb ish barrier on __sync builtins

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105162 Sebastian Pop changed: What|Removed |Added Attachment #52755|0 |1 is obsolete|

[Bug target/105162] [AArch64] outline-atomics drops dmb ish barrier on __sync builtins

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105162 Sebastian Pop changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/105162] [AArch64] outline-atomics drops dmb ish barrier on __sync builtins

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105162 Sebastian Pop changed: What|Removed |Added Attachment #52762|0 |1 is obsolete|

[Bug debug/98776] DW_AT_low_pc is inconsistent with function entry address, when enabling -fpatchable-function-entry

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98776 Sebastian Pop changed: What|Removed |Added CC||spop at gcc dot gnu.org --- Comment #9

[Bug debug/98776] DW_AT_low_pc is inconsistent with function entry address, when enabling -fpatchable-function-entry

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98776 Sebastian Pop changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug debug/98776] DW_AT_low_pc is inconsistent with function entry address, when enabling -fpatchable-function-entry

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98776 --- Comment #10 from Sebastian Pop --- Patch for arm64: https://gcc.gnu.org/pipermail/gcc-patches/2022-December/607601.html

[Bug middle-end/107485] New: gcc-10 ICE with -fnon-call-exception

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107485 Bug ID: 107485 Summary: gcc-10 ICE with -fnon-call-exception Product: gcc Version: 10.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: middle-end

[Bug middle-end/107485] [10 Regression] gcc-10 ICE with -fnon-call-exception

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107485 --- Comment #10 from Sebastian Pop --- Thanks Richard. The patch fixed the larger test as well.

[Bug target/109519] New: aarch64: wrong code with NEON intrinsics on gcc-10 and later

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109519 Bug ID: 109519 Summary: aarch64: wrong code with NEON intrinsics on gcc-10 and later Product: gcc Version: 10.0 Status: UNCONFIRMED Severity: normal

[Bug target/109519] aarch64: wrong code with NEON intrinsics on gcc-10 and later

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109519 --- Comment #5 from Sebastian Pop --- Thanks Andrew for the patch, it fixes the issue.

[Bug tree-optimization/107409] Perf loss ~5% on 519.lbm_r SPEC cpu2017 benchmark with r10-5090-ga9a4edf0e71bba

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107409 Sebastian Pop changed: What|Removed |Added CC||spop at gcc dot gnu.org --- Comment