[Bug target/114194] ICE when using std::unique_ptr with xtheadvector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114194 --- Comment #6 from Bruce Hoult --- The ICE also happens with bzero(). The ICE does NOT happen with a constant length of 16 of greater, in which case a function call is made instead of expanding inline. With rv64gv or rv64gcv a series of N `sb` are generated (N < 16) With rv64gc_xtheadvector, N >= 6, and -Os a tail call to memset is generated, no ICE. With N < 6 ... ICE. So the problem is only trying to expand memset() or bzero() inline. Does it try to use a vectorised memset? That doesn't happen with rv64gcv. memcpy() does not ICE for any N. I assume the originally reported C++ code is generating a memset() to initialise one of the classes/structs.
[Bug target/114194] ICE when using std::unique_ptr with xtheadvector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114194 --- Comment #5 from Bruce Hoult --- oops .. 379 lines .. I grep'd wrong. Anyway... gcc/config/riscv/riscv-vector-switch.def -ENTRY (RVVMF2QI, true, LMUL_F2, 16) -ENTRY (RVVMF4QI, true, LMUL_F4, 32) -ENTRY (RVVMF8QI, TARGET_MIN_VLEN > 32, LMUL_F8, 64) +ENTRY (RVVMF2QI, !TARGET_XTHEADVECTOR, LMUL_F2, 16) +ENTRY (RVVMF4QI, !TARGET_XTHEADVECTOR, LMUL_F4, 32) +ENTRY (RVVMF8QI, TARGET_MIN_VLEN > 32 && !TARGET_XTHEADVECTOR, LMUL_F8, 64) Fractional LMUL (including RVVMF8QI) is removed. Correct, 0.7.1 doesn't have it. But something still tries to use it.
[Bug target/114194] ICE when using std::unique_ptr with xtheadvector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114194 --- Comment #4 from Bruce Hoult --- I've bisected this and the problem is introduced in 2d7205eb2c3 "RISC-V: Handle differences between XTheadvector and Vector" Fortunately this commit touches only 136 lines of code, unlike the later two xtheadvector commits which are 1119 and 204 touched lines.
[Bug target/114194] ICE when using std::unique_ptr with xtheadvector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114194
--- Comment #3 from Bruce Hoult ---
Simpler example, found independently.
void *memset();
void a(void *b){ memset(b, 0, 1lu); }
There might be a lot of code that triggers this. Fortunately the source file
this happened in didn't actually use RVV (others did) so I was able to simply
use rv64gc for it.
[Bug target/114172] [13 only] ICE with riscv rvv VSETVL intrinsic
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114172
Bruce Hoult changed:
What|Removed |Added
CC||bruce at hoult dot org
--- Comment #1 from Bruce Hoult ---
Even simpler version:
#pragma riscv intrinsic "vector"
void b(long c) {
for (;;) {
c = __riscv_vsetvl_e32m4(c);
vfloat32m4_t d;
e(c, d);
}
}
[Bug c/114226] ICE on valid vanilla code when xtheadvector enabled
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114226
Bruce Hoult changed:
What|Removed |Added
Keywords||ice-on-valid-code
URL||https://godbolt.org/z/7x4rM
||hvW1
--- Comment #3 from Bruce Hoult ---
gah! It deleted the description, URL, keywords etc I was in the middle of
writing when I added an attachment of the compiler output! Sorry!
Code:
void *memset();
void a(void *b){ memset(b, 0, 1lu); }
Compile command:
riscv64-unknown-elf-gcc -O -c -march=rv64gc_xtheadvector bug.c
GCC version: 14.0.1 self compiled 306a4c322353 Mar 2 Daily bump.
System type: RISC-V.
Happens on LicheePi 4A, VisionFive 2, QEMU, and cross-compiler on Godbolt.
The original code was the main program for a program that used RVV intrinsics
in other files, but not in this one. For simplicity the same options were
passed for all source files.
Compiler build options (local .. I don't know what Godbolt uses):
/root/riscv-gnu-toolchain/gcc/configure --target=riscv64-unknown-elf
--prefix=/root/_install --disable-shared --disable-threads
--enable-languages=c,c++ --with-pkgversion=g --with-system-zlib --enable-tls
--with-newlib --with-sysroot=/root/_install/riscv64-unknown-elf
--with-native-system-header-dir=/include --disable-libmudflap --disable-libssp
--disable-libquadmath --disable-libgomp --disable-nls
--disable-tm-clone-registry --src=.././gcc --disable-multilib --with-abi=lp64d
--with-arch=rv64imafdc --with-tune=rocket --with-isa-spec=20191213
'CFLAGS_FOR_TARGET=-Os-mcmodel=medlow' 'CXXFLAGS_FOR_TARGET=-Os
-mcmodel=medlow'
[Bug c/114226] ICE on valid vanilla code when xtheadvector enabled
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114226 --- Comment #2 from Bruce Hoult --- Created attachment 57601 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=57601=edit compiler output
[Bug c/114226] New: ICE on valid vanilla code when xtheadvector enabled
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114226 Bug ID: 114226 Summary: ICE on valid vanilla code when xtheadvector enabled Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: c Assignee: unassigned at gcc dot gnu.org Reporter: bruce at hoult dot org Target Milestone: ---
