[Bug target/113950] New: PowerPC, ICE with -O1 or higher compiling __builtin_vsx_splat_2di test case
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113950
Bug ID: 113950
Summary: PowerPC, ICE with -O1 or higher compiling
__builtin_vsx_splat_2di test case
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: carll at gcc dot gnu.org
Target Milestone: ---
Power 10 LE
Fedora 38
Test of the __builtin_vsx_splat_2di ICEs on GCC 12 and later.
The following test case generates an ICE for -O1 and above. It does work for
-O0.
void abort (void);
int main ()
{
int i;
vector signed long long vsll_result, vsll_expected_result;
signed long long sll_arg1;
sll_arg1 = 300;
vsll_expected_result = (vector signed long long) {300, 300};
vsll_result = __builtin_vsx_splat_2di (sll_arg1); //ISSUE
for (i = 0; i < 2; i++)
if (vsll_result[i] != vsll_expected_result[i])
abort();
return 0;
}
The test case compiles fine with -O0.
Here is the output when I try to compile with -O1:
gcc -g -O1 compiler-bug.c -o compiler-bug
compiler-bug.c: In function ‘main’:
compiler-bug.c:19:1: error: unrecognizable insn:
19 | }
| ^
(insn 14 13 15 2 (set (reg:V2DI 117 [ _1 ])
(vec_duplicate:V2DI (const_int 300 [0x12c]))) "compiler-bug.c":12:17 -1
(nil))
during RTL pass: vregs
compiler-bug.c:19:1: internal compiler error: in extract_insn, at recog.cc:2791
Please submit a full bug report, with preprocessed source.
See for instructions.
Preprocessed source stored into /tmp/ccnoI5lr.out file, please attach this to
your bugreport.
[Bug target/111645] Intrinsics vec_sldb /vec_srdb fail with __vector unsigned __int128
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111645
Carl Love changed:
What|Removed |Added
CC||carll at gcc dot gnu.org
--- Comment #5 from Carl Love ---
There are a couple of issues with the test case in the attachment. For example
one of the tests is:
static inline vui64_t
vec_vsldbi_64 (vui64_t vra, vui64_t vrb, const unsigned int shb)
{
return vec_sldb (vra, vrb, shb);
}
When I tried to compile it, it seemed to compile. However if I take off the
static inline, then I get an error about in compatible arguments. The built-in
requires an explicit integer be based in the third argument. The following
worked for me:
static inline vui64_t
vec_vsldbi_64 (vui64_t vra, vui64_t vrb, const unsigned int shb)
{
return vec_sldb (vra, vrb, 1);
}
The compiler/assembler needs an explicit value for the third argument as it has
to generate the instruction with the immediate shift value as part of the
instruction. Hence a variable for the third argument will not work.
Agreed that the __int128 arguments can and should be supported. Patch to add
that support is in progress but will require getting the LLVM/OpenXL team to
agree to adding the __128int variants as well.
[Bug target/108396] [12/13 Regression] PPCLE: vec_vsubcuq missing since r12-5752-gd08236359eb229
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108396
Carl Love changed:
What|Removed |Added
CC||carll at gcc dot gnu.org
--- Comment #9 from Carl Love ---
I made a copy of rs6000-overload.def and then with a series of emacs macros
converted the list of builtins to a script to grep for the builtins in the test
directory. Specifically from rs6000-overload.def:
[BCDADD, __builtin_bcdadd, __builtin_vec_bcdadd]
vsq __builtin_vec_bcdadd (vsq, vsq, const int);
BCDADD_V1TI
vuc __builtin_vec_bcdadd (vuc, vuc, const int);
BCDADD_V16QI
[BCDADD_EQ, __builtin_bcdadd_eq, __builtin_vec_bcdadd_eq]
signed int __builtin_vec_bcdadd_eq (vsq, vsq, const int);
BCDADD_EQ_V1TI
signed int __builtin_vec_bcdadd_eq (vuc, vuc, const int);
BCDADD_EQ_V16QI
Was converted to the bash script:
rm -f ../test1_not_found
NOT_FOUND='0 0 0'
check_name () {
str1=$(grep -r $1 * | wc)
# echo " output of command: $str1"
if [[ "$str1" == *"$NOT_FOUND"* ]]; then
echo "$1 not found" >> ../test1_not_found
fi
}
check_name "__builtin_bcdadd" "__builtin_vec_bcdadd"
check_name "__builtin_bcdadd_eq" "__builtin_vec_bcdadd_eq"
The script is passed the user built-in name ($str1) and the internal built-in
name ($str2). I ran the script in directory gcc/testsuite/gcc.target/powerpc
and it identified two tests ($str1) as not showing up in a test file. The
tests were: __builtin_bcdsub_ge and __builtin_bcdsub_le.
I figure if the first builtin name has a test associated with it that should be
sufficient. I will create a patch to add testcases for the two missing
builtin-names.
I did add to the script to see how many definitions have a test for the
built-in name $1 but not the built-in name $2 doesn't show up in a test file.
My script identified 86 of these cases. Not sure that we really need to add
test cases for the internal builtin name ($str). Thoughts?
[Bug target/93448] PPC: missing builtin for DFP quantize(dqua,dquai,dquaq,dquaiq)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93448 --- Comment #8 from Carl Love --- Status updated to resolved, fixed.
[Bug target/93448] PPC: missing builtin for DFP quantize(dqua,dquai,dquaq,dquaiq)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93448 Carl Love changed: What|Removed |Added Resolution|--- |FIXED Status|NEW |RESOLVED CC||carll at gcc dot gnu.org --- Comment #7 from Carl Love --- Patch to add built-ins for DFP quantize have been committed.
[Bug target/100930] PPC: Missing builtins for P9 vextsb2w, vextsb2w, vextsb2d, vextsh2d, vextsw2d
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100930 Carl Love changed: What|Removed |Added CC||carll at gcc dot gnu.org --- Comment #3 from Carl Love --- So, with a little archaeological digging.. Looks like the patch was committed to mainline on 6/8/2021 as follows: From db042e1603db5057314c404eded73c45f60ad2d6 Mon Sep 17 00:00:00 2001 From: Carl Love Date: Mon, 3 Feb 2020 14:41:42 -0600 Subject: [PATCH] RS6000 Add 128-bit Binary Integer sign extend operations This patch adds the 128-bit sign extension instruction support and corresponding builtin support. RS6000 Add 128-bit Binary Integer sign extend operations 2021-06-08 Carl Love gcc/ChangeLog * config/rs6000/altivec.h (vec_signextll, vec_signexti, vec_signextq): Add define for new builtins. * config/rs6000/altivec.md(altivec_vreveti2): Add define_expand. * config/rs6000/rs6000-builtin.def (VSIGNEXTI, VSIGNEXTLL): Add overloaded builtin definitions. (VSIGNEXTSB2W, VSIGNEXTSH2W, VSIGNEXTSB2D, VSIGNEXTSH2D,VSIGNEXTSW2D, VSIGNEXTSD2Q): Add builtin expansions. (SIGNEXT): Add P10 overload definition. * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_VSIGNEXTI, P9V_BUILTIN_VEC_VSIGNEXTLL, P10_BUILTIN_VEC_SIGNEXT): Add overloaded argument definitions. * config/rs6000/vsx.md (vsx_sign_extend_v2di_v1ti): Add define_insn. (vsignextend_v2di_v1ti, vsignextend_qi_, vsignextend_hi_, vsignextend_si_v2di)[VIlong]: Add define_expand. Make define_insn vsx_sign_extend_si_v2di visible. * doc/extend.texi: Add documentation for the vec_signexti, vec_signextll builtins and vec_signextq. gcc/testsuite/ChangeLog * gcc.target/powerpc/int_128bit-runnable.c (extsd2q): Update expected count. Add tests for vec_signextq. * gcc.target/powerpc/p9-sign_extend-runnable.c: New test case. Looking at the GCC 11 tree it looks like I did backport and commit it there as well: commit 88b66b376844fe7c537ab229250a41a54e706eaf Author: Carl Love Date: Tue Jun 15 11:37:31 2021 -0500 RS6000 Add 128-bit Binary Integer sign extend operations This patch adds the 128-bit sign extension instruction support and corresponding builtin support. RS6000 Add 128-bit Binary Integer sign extend operations 2021-06-08 Carl Love gcc/ChangeLog * config/rs6000/altivec.h (vec_signextll, vec_signexti, vec_signext\ q): Add define for new builtins. * config/rs6000/altivec.md(altivec_vreveti2): Add define_expand. * config/rs6000/rs6000-builtin.def (VSIGNEXTI, VSIGNEXTLL): Add overloaded builtin definitions. (VSIGNEXTSB2W, VSIGNEXTSH2W, VSIGNEXTSB2D, VSIGNEXTSH2D,VSIGNEXTSW2\ D, VSIGNEXTSD2Q): Add builtin expansions. (SIGNEXT): Add P10 overload definition. * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_VSIGNEXTI, P9V_BUILTIN_VEC_VSIGNEXTLL, P10_BUILTIN_VEC_SIGNEXT): Add overloaded argument definitions. * config/rs6000/vsx.md (vsx_sign_extend_v2di_v1ti): Add define_insn\ . (vsignextend_v2di_v1ti, vsignextend_qi_, vsignextend_hi_, vsignextend_si_v2di)[VIlong]: Add define_expand. Make define_insn vsx_sign_extend_si_v2di visible. * doc/extend.texi: Add documentation for the vec_signexti, vec_signextll builtins and vec_signextq. gcc/testsuite/ChangeLog * gcc.target/powerpc/int_128bit-runnable.c (extsd2q): Update expect\ ed count. Add tests for vec_signextq. * gcc.target/powerpc/p9-sign_extend-runnable.c: New test case. Probably should have fixed the commit log date. So, it looks to me like this has been done and the issue should be closed.
[Bug target/102169] powerpc64 int memory operations using FP instructions
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102169
Carl Love changed:
What|Removed |Added
CC||carll at gcc dot gnu.org
--- Comment #5 from Carl Love ---
With no optimization, GCC generates a three instruction sequence to store to
the stack frame rather than using a single stw instruction.
Adding this for informational purposes per Segher's request.
The test program
#include
#include
int marker2 (int a) { return (1); }
int
main (int argc, char **argv, char **envp)
{
marker2 (43);
return argc;
}
Generates the three instruction sequence in both the main and marker2 function.
Just cutting and pasting the marker2 code for P9 and P10.
On Power 9
carll@marlin:~$ gcc -g stfiwx-bug.c -o stfiwx-bug
carll@marlin:~$ objdump -S -d stfiwx-bug > stfiwx-bug.dump
carll@marlin:~$ which gcc
/usr/bin/gcc
carll@marlin:~$ gcc --version
gcc (Ubuntu 9.3.0-17ubuntu1~20.04) 9.3.0
int marker2 (int a) { return (1); }
7bc: f8 ff e1 fb std r31,-8(r1)
7c0: c1 ff 21 f8 stdur1,-64(r1)
7c4: 78 0b 3f 7c mr r31,r1
7c8: 78 1b 69 7c mr r9,r3
7cc: 2c 00 3f 91 stw r9,44(r31) << here
7d0: 01 00 20 39 li r9,1
7d4: 78 4b 23 7d mr r3,r9
7d8: 40 00 3f 38 addir1,r31,64
7dc: f8 ff e1 eb ld r31,-8(r1)
7e0: 20 00 80 4e blr
on Power 10
carll@ltcd97-lp1:~$ gcc -g stfiwx-bug.c -o stfiwx-bug
carll@ltcd97-lp1:~$ objdump -S -d stfiwx-bug > stfiwx-bug.dump
carll@ltcd97-lp1:~$ which gcc
/usr/bin/gcc
carll@ltcd97-lp1:~$ gcc --version
gcc (Ubuntu 10.3.0-1ubuntu1) 10.3.0
int marker2 (int a) { return (1); }
7bc: f8 ff e1 fb std r31,-8(r1)
7c0: c1 ff 21 f8 stdur1,-64(r1)
7c4: 78 0b 3f 7c mr r31,r1
7c8: 78 1b 69 7c mr r9,r3
7cc: e6 01 09 7c mtfprwz f0,r9 << here
7d0: 2c 00 3f 39 addir9,r31,44 << here
7d4: ae 4f 00 7c stfiwx f0,0,r9 << here
7d8: 01 00 20 39 li r9,1
7dc: 78 4b 23 7d mr r3,r9
7e0: 40 00 3f 38 addir1,r31,64
7e4: f8 ff e1 eb ld r31,-8(r1)
7e8: 20 00 80 4e blr
[Bug target/93449] PPC: Missing conversion builtin from vector to _Decimal128 and vice versa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93449 Carl Love changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED --- Comment #11 from Carl Love --- Patch committed to fix issue
