Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: christophe.le...@c-s.fr
Target Milestone: ---
unsigned long f(unsigned short x)
{
return (x << 16) | x;
}
Results in:
:
0: 54 69 80 1e rlwi
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: christophe.le...@c-s.fr
Target Milestone: ---
GCC 9.2 add nops in front of loops. GCC 8.1 didn't when compiled for powerpc
8xx. On the 8xx, a nop is 1 cycle and alignment of loops provide no benefit, so
this is a waste
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92769
--- Comment #2 from Christophe Leroy ---
But CR0 being volatile doesn't prevent GCC to set/clr its SO bit just before
branching to LR as the ASM functions do, does it ?
In our ABIs, r3 is also volatile in our ABIs, it doesn't prevent using it
Assignee: unassigned at gcc dot gnu.org
Reporter: christophe.le...@c-s.fr
Target Milestone: ---
Linux system calls and Linux VDSO calls require the error status to be
reflected through SO bit of CR0 register on function return.
There is no way to do that from C functions
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: christophe.le...@c-s.fr
Target Milestone: ---
unsigned long f1(unsigned long a, unsigned long b)
{
return a >> ((4 - a) * 8);
}
unsigned long f2(unsigned long a, unsigned
Assignee: unassigned at gcc dot gnu.org
Reporter: christophe.le...@c-s.fr
Target Milestone: ---
unsigned int g(unsigned int val)
{
unsigned int mask = 0x7f7f7f7f;
return ~(((val & mask) + mask) | val | mask);
}
generates the following:
0020 :
20: 3d 20 7
rity: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: christophe.le...@c-s.fr
Target Milestone: ---
unsigned char g(unsigned char t[], unsigned char v)
{
return (t[v & 0x7f] & 0x7f) | (v & 0x80);
}
0008 :
8: 54 89 06 7e clrlwi r9
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: christophe.le...@c-s.fr
Target Milestone: ---
The below code should give the same code, shouldn't depend on whether we use
p[i] or *p++
void memset32a(int *p, int v, unsigned int c)
{
int
normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: christophe.le...@c-s.fr
Target Milestone: ---
I would expect the two functions below to generate the same code, but it
doesn't
unsigned int f1(unsigned int i)
{
return 1U <
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: christophe.le...@c-s.fr
Target Milestone: ---
In the function below, the two first 'mr' instructions are unneeded, the loop
should operate directly with r5 and r6
void memset64(long long *p, long long v, unsigned int c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67288
--- Comment #2 from Christophe Leroy christophe.le...@c-s.fr ---
Compilation ok with below code
[root@localhost knl]# cat flush.c
#define L1_CACHE_SHIFT 4
#define L1_CACHE_BYTES (1 L1_CACHE_SHIFT)
#define mb() __asm__ __volatile__ (sync
Severity: normal
Priority: P3
Component: regression
Assignee: unassigned at gcc dot gnu.org
Reporter: christophe.le...@c-s.fr
Target Milestone: ---
The following function (Linux Kernel, compiled with -O2) was resulting in a
good assembly with GCC 4.8.3
Assignee: unassigned at gcc dot gnu.org
Reporter: christophe.le...@c-s.fr
Target Milestone: ---
#define u32 unsigned long
#define u64 unsigned long long
u64 target(u64 base, u32 offset)
{
return base + offset;
}
With GCC 4.9.3 we get: (same with GCC 4.8.3)
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