[Bug tree-optimization/84013] wrong __restrict clique with inline asm operand

2018-10-03 Thread katsunori.kumatani at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84013 --- Comment #5 from Katsunori Kumatani --- Hi, any news of this for GCC 9? I'm guessing it requires a bit more changes, hopefully not forgotten though. Currently I'm using a custom patched GCC 8 for it (and to test plugin behavior with it) but it

[Bug tree-optimization/84013] wrong __restrict clique with inline asm operand

2018-02-01 Thread katsunori.kumatani at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84013 --- Comment #4 from Katsunori Kumatani --- Thanks, it's quite useful in some "meta asm" cases (in conjunction with plugins, asms can be useful since you can't add builtins). Or when doing custom calls in asms (or syscalls, etc) and you know what

[Bug tree-optimization/84013] wrong __restrict clique with inline asm operand

2018-01-31 Thread katsunori.kumatani at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84013 --- Comment #2 from Katsunori Kumatani --- I'm not familiar with tree-ssa-structalias, but it appears to me that the "fix" is quite simple? Or am I missing something? Here's the snippet from it, updated with my attempt: if (restrict_var)

[Bug tree-optimization/84013] New: wrong __restrict clique with inline asm operand

2018-01-23 Thread katsunori.kumatani at gmail dot com
: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: katsunori.kumatani at gmail dot com Target Milestone: --- Using a __restrict parameter in an asm results in the wrong clique assigned to the MEM_REF if the same pointer is used without an asm (where it has the

[Bug target/53383] Allow -mpreferred-stack-boundary=3 on x86-64

2017-03-28 Thread katsunori.kumatani at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53383 Katsunori Kumatani changed: What|Removed |Added CC||katsunori.kumatani at gmail dot co

[Bug target/79748] [Enhancement] no_callee_saved_registers function attribute (on x86)

2017-02-28 Thread katsunori.kumatani at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79748 --- Comment #3 from Katsunori Kumatani --- Well, I remembered I omitted another simple situation in which it would help. But because this attribute does not exist right now, I'll have to show you a "what-it-could-be" output code if it did exist.

[Bug target/79748] [Enhancement] no_callee_saved_registers function attribute (on x86)

2017-02-28 Thread katsunori.kumatani at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79748 --- Comment #2 from Katsunori Kumatani --- I tried -O3 -fipa-ra on the following example code but it seems it doesn't do what I suggested: (I used inline asm to force it to use a callee-saved register, no other reason... just to demonstrate) #

[Bug target/79748] New: [Enhancement] no_callee_saved_registers function attribute (on x86)

2017-02-28 Thread katsunori.kumatani at gmail dot com
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: katsunori.kumatani at gmail dot com Target Milestone: --- This is not a bug but a feature request/enhancement (hopefully simple?). On x86(-64), upcoming GCC has added the

[Bug rtl-optimization/79593] [6/7 Regression] Poor/Worse code generation for FPU on versions after 6

2017-02-22 Thread katsunori.kumatani at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79593 --- Comment #16 from Katsunori Kumatani --- I see! It was more a side note than anything when I inspected GCC 7's output, I am not even sure if it affects x87 only (not sure if I should have opened another bug for it, but I guess it doesn't matt

[Bug target/79593] [6/7 Regression] Poor/Worse code generation for FPU on versions after 6

2017-02-21 Thread katsunori.kumatani at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79593 --- Comment #13 from Katsunori Kumatani --- Ah sorry! I skimmed through that as I thought it was talking about the patch's fld (that it improved). Thanks, it's good to know the cause at least :) I hope it makes it easier to improve if needed to

[Bug target/79593] [6/7 Regression] Poor/Worse code generation for FPU on versions after 6

2017-02-21 Thread katsunori.kumatani at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79593 --- Comment #11 from Katsunori Kumatani --- Sorry, one small thing I need to mention in case it's not obvious at first glance. The GCC 6 vs GCC 5 portion of code I showed has *exactly* the same behavior. It's not that it "uses the value later t

[Bug target/79593] [6/7 Regression] Poor/Worse code generation for FPU on versions after 6

2017-02-21 Thread katsunori.kumatani at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79593 --- Comment #10 from Katsunori Kumatani --- (In reply to Uroš Bizjak from comment #7) > > This patch allows conversion from (reg->reg) move to (const->reg) when > appropriate constant can be determined from REG_EQUIV/REG_EQUAL note. It > also h

[Bug target/79593] [6/7 Regression] Poor/Worse code generation for FPU on versions after 6

2017-02-20 Thread katsunori.kumatani at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79593 --- Comment #4 from Katsunori Kumatani --- I forgot to mention that in the particular above example, it is obvious the "fstp" is useless. If you remove the "fld st(0)" and then the 'p' from the fstp, you end up with "fst st(0)" which is basicall

[Bug target/79593] [6/7 Regression] Poor/Worse code generation for FPU on versions after 6

2017-02-20 Thread katsunori.kumatani at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79593 --- Comment #3 from Katsunori Kumatani --- Hi, sorry I forgot to mention, I used Godbolt's Compiler Explorer to test it on GCC 5 and 7 as I only have version 6 deployed on this machine. On my end, it probably used march 'native' by default (?) b

[Bug rtl-optimization/79593] New: [Regression] Poor/Worse code generation for FPU on versions after 6

2017-02-18 Thread katsunori.kumatani at gmail dot com
Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: katsunori.kumatani at gmail dot com Target Milestone: --- First of all sorry if the "Component" is set wrong, I didn't know what to pick (in respec

[Bug inline-asm/79552] [6 Regression] Wrong code generation due to -fschedule-insns, with __restrict__ and inline asm

2017-02-16 Thread katsunori.kumatani at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79552 --- Comment #3 from Katsunori Kumatani --- (In reply to Uroš Bizjak from comment #1) > (In reply to Katsunori Kumatani from comment #0) > > > Things to note: > > > > This happens on GCC 6 and up to 7 only, GCC 5.4 generates correct output. > >

[Bug inline-asm/79552] New: [Regression GCC 6+] Wrong code generation due to -fschedule-insns, with __restrict__ and inline asm

2017-02-16 Thread katsunori.kumatani at gmail dot com
: UNCONFIRMED Severity: normal Priority: P3 Component: inline-asm Assignee: unassigned at gcc dot gnu.org Reporter: katsunori.kumatani at gmail dot com Target Milestone: --- This is a regression bug leading to wrong code generation with __restrict__ in C++ and