[Bug target/95683] New: internal compiler error: in riscv_gpr_save_operation_p, at config/riscv/riscv.c:5219

2020-06-15 Thread kito.cheng at gmail dot com 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95683

Bug ID: 95683
   Summary: internal compiler error: in
riscv_gpr_save_operation_p, at
config/riscv/riscv.c:5219
   Product: gcc
   Version: unknown
Status: UNCONFIRMED
  Keywords: ice-on-valid-code
  Severity: normal
  Priority: P3
 Component: target
  Assignee: unassigned at gcc dot gnu.org
  Reporter: kito.cheng at gmail dot com
  Target Milestone: ---
Target: riscv64-unknown-elf

Report by Pat Pannuto at github:
https://github.com/riscv/riscv-gcc/issues/190

Testcase:

void a() {
  asm(""
  :
  :
  : "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3",
"t4", "t5", "t6", "ra");
}

Error message:
during RTL pass: ira
/scratch1/kitoc/riscv-gnu-workspace/riscv-gnu-toolchain-trunk/riscv-gcc/gcc/testsuite/gcc.target/riscv/pr95252-2.c:
In function 'a':
/scratch1/kitoc/riscv-gnu-workspace/riscv-gnu-toolchain-trunk/riscv-gcc/gcc/testsuite/gcc.target/riscv/pr95252-2.c:10:1:
internal compiler error: in riscv_gpr_save_operation_p, at
config/riscv/riscv.c:5219
   10 | }
  | ^
0x1662745 riscv_gpr_save_operation_p(rtx_def*)
   
../../../../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/config/riscv/riscv.c:5219
0x1a6829d gpr_save_operation_1
   
../../../../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/config/riscv/predicates.md:213
0x1a682cf gpr_save_operation(rtx_def*, machine_mode)
   
../../../../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/config/riscv/predicates.md:220
0x1a7e441 recog(rtx_def*, rtx_insn*, int*)
   
../../../../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/config/riscv/riscv.md:2499
0x10cdd2c recog_memoized
../../../../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/recog.h:167
0x10d6dd8 elimination_costs_in_insn
../../../../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/reload1.c:3525
0x10d1aa1 calculate_elim_costs_all_insns()
../../../../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/reload1.c:1604
0xeba7fc ira_costs()
../../../../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/ira-costs.c:2293
0xeb0b2d ira_build()
../../../../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/ira-build.c:3432
0xea6877 ira
../../../../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/ira.c:5353
0xea70f4 execute
../../../../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/ira.c:5666
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.

[Bug target/95252] testcase gcc.dg/torture/pr67916.c failure when testing with -msave-restore

2020-06-01 Thread kito.cheng at gmail dot com 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95252

Kito Cheng  changed:

   What|Removed |Added

 CC||kito.cheng at gmail dot com

--- Comment #8 from Kito Cheng  ---
It seems like because register rename thought all callee-saved register can be
used, because df_regs_ever_live_p return true for all callee-saved register
now, so seems like we really need an exact pattern to describe that, that's put
into my tomorrows TODO list.

[Bug c++/94044] [10 Regression] internal compiler error: in comptypes, at cp/typeck.c:1490 on riscv64-unknown-linux-gnu and arm-eabi

2020-03-13 Thread kito.cheng at gmail dot com 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94044

--- Comment #5 from Kito Cheng  ---
Hi Nathan:

Double confirmed again, it still ICE to me, but I might miss some info so I
post my env and configure option:

GCC: g:b73f69020f08208d2d969fcf8879bd294a6e3596

Host: x86_64-linux (Ubuntu 18.04)
Target: arm-eabi
Configure option: --target=arm-eabi --enable-languages=c,c++

Bootstrap gcc only
$ arm-eabi-g++
../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/testsuite/g++.dg/cpp0x/variadic-sizeof4.C
-std=c++14


reduced cc1plus command:
$
/scratch1/kitoc/riscv-gnu-workspace/pr94044/arm-eabi/install/bin/../libexec/gcc/arm-eabi/10.0.1/cc1plus
-quiet 
../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/testsuite/g++.dg/cpp0x/variadic-sizeof4.C
-quiet -mcpu=arm7tdmi -marm -march=armv4t -std=c++14  -o -

debug info:
#6  0x008abd8b in comptypes (t1=0x76964f18, t2=,
strict=)
at ../../../../riscv-gnu-toolchain-trunk/riscv-gcc/gcc/cp/typeck.c:1489
1489  gcc_checking_assert (TREE_CODE (t1) != TYPE_ARGUMENT_PACK
(gdb) call debug_tree(t1)

[Bug c++/94044] [10 Regression] internal compiler error: in comptypes, at cp/typeck.c:1490 on riscv64-unknown-linux-gnu and arm-eabi

2020-03-12 Thread kito.cheng at gmail dot com 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94044

Kito Cheng  changed:

   What|Removed |Added

 CC||kito.cheng at gmail dot com

--- Comment #3 from Kito Cheng  ---
still ice for riscv64 and arm after
r10-7074-g191bcd0f30dd37dec773efb0125afdcae9bd90ef

[Bug target/91441] ICE in asan_shadow_offset at asan.c:342 on riscv64 target

2019-08-14 Thread kito.cheng at gmail dot com 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91441

--- Comment #1 from Kito Cheng  ---
Confirmed, a hot fix here, will send to gcc-patch after test.

diff --git a/gcc/toplev.c b/gcc/toplev.c
index 7e0b9216dea..5dd5b66b89c 100644
--- a/gcc/toplev.c
+++ b/gcc/toplev.c
@@ -1744,20 +1744,12 @@ process_options (void)
   /* Address Sanitizer needs porting to each target architecture.  */

   if ((flag_sanitize & SANITIZE_ADDRESS)
-  && !FRAME_GROWS_DOWNWARD)
+  && (!FRAME_GROWS_DOWNWARD || targetm.asan_shadow_offset == NULL))
 {
   warning_at (UNKNOWN_LOCATION, 0,
  "%<-fsanitize=address%> and %<-fsanitize=kernel-address%> "
  "are not supported for this target");
-  flag_sanitize &= ~SANITIZE_ADDRESS;
-}
-
-  if ((flag_sanitize & SANITIZE_USER_ADDRESS)
-  && targetm.asan_shadow_offset == NULL)
-{
-  warning_at (UNKNOWN_LOCATION, 0,
- "%<-fsanitize=address%> not supported for this target");
-  flag_sanitize &= ~SANITIZE_ADDRESS;
+  flag_sanitize &= ~(SANITIZE_ADDRESS | SANITIZE_USER_ADDRESS);
 }

  /* Do not use IPA optimizations for register allocation if profiler is active