[Bug target/104689] aarch64: libgcc: DW_CFA_val_expression is not supported for RA_SIGN_SATE register
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104689 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org --- Comment #3 from Ramana Radhakrishnan --- (In reply to nsz from comment #2) > fixed for gcc-13 In an AArch64 Ubuntu 22.04 VM on my Apple Silicon M1 I see : Features: fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i.e. PACA / PACG , I see this test failing with trunk as of 136029059686fed2d99c755baf35f98553fc0232 simply bootstrapped with $srcdir/configure --enable-languages=c,c++ . I'll see if I can pull something out when I have some time. Ramana
[Bug other/107620] Build errors when using sphinx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107620 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org --- Comment #3 from Ramana Radhakrishnan --- I worked around this by installing everything in $SRCDIR/doc/requirements.txt. pip3 install -r requirements.txt I found that using that allowed me to build html documentation. However I seemed to need in addition a whole bunch of stuff to build latex and pdf documentation. Ramana
[Bug tree-optimization/107326] [13 Regression] ICE: verify_gimple failed (error: type mismatch in binary expression) since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107326 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org --- Comment #4 from Ramana Radhakrishnan --- Fixed ?
[Bug target/92999] [armhf] struct with adjacent __fp16's copies wrongly
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92999 Ramana Radhakrishnan changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org Status|NEW |ASSIGNED --- Comment #3 from Ramana Radhakrishnan --- I think I have a patch but might need some help testing it.
[Bug target/105929] [AArch64] armv8.4-a allows atomic stp. 64-bit constants can use 2 32-bit halves with _Atomic or volatile
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105929 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 Status|UNCONFIRMED |NEW Last reconfirmed||2022-11-05 --- Comment #1 from Ramana Radhakrishnan --- Confirmed as an 8 byte aligned store is always going to be fully within a 16 byte block aligned to a 16 byte aligned address.
[Bug debug/53135] Duplicates cause size explosion (vta/dwarf)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53135 --- Comment #20 from Ramana Radhakrishnan --- (In reply to Jeffrey A. Law from comment #19) > I think it's just workaround that got installed in 2012, not a real fix. > Of course, 10 years later one could ask if the workaround has become the > "real fix". That is of course a jolly good question :P Ramana
[Bug target/107533] New: Inefficient code sequence for fp16 testcase on aarch64
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107533
Bug ID: 107533
Summary: Inefficient code sequence for fp16 testcase on aarch64
Product: gcc
Version: 13.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: ramana at gcc dot gnu.org
Target Milestone: ---
Derived from PR92999
struct phalf {
__fp16 first;
__fp16 second;
};
struct phalf phalf_copy(struct phalf* src) __attribute__((noinline));
struct phalf phalf_copy(struct phalf* src) {
return *src;
}
Compiling for AArch64 with a recent enough compiler produces.
phalf_copy:
ldr w0, [x0]
ubfxx1, x0, 0, 16
lsr w0, w0, 16
dup v0.4h, w1
dup v1.4h, w0
ret
Couldn't it just be ldr h0, [x0]
ldr h1, [x0, 2]
IIRC this is in base v8 rather than v8.2
regards
Ramana
[Bug target/92999] [armhf] struct with adjacent __fp16's copies wrongly
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92999 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |NEW CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 Known to fail||13.0 Last reconfirmed||2022-11-05 --- Comment #2 from Ramana Radhakrishnan --- confirmed on trunk. I think this is an issue in the way the registers are allocated for the VFP PCS.
[Bug debug/100523] [11/12/13 Regression] armv8.1-m.main -fcompare-debug failure with -O -fmodulo-sched -mtune=cortex-a53
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100523 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org --- Comment #3 from Ramana Radhakrishnan --- It does fall over but isn't this is a bit of an undefined testcase given that crc is an uninitialised local variable used before initialisation ? What am I missing ? Ramana
[Bug target/94604] support for the ETSI basic operations
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94604 Ramana Radhakrishnan changed: What|Removed |Added Ever confirmed|0 |1 Status|UNCONFIRMED |WAITING Last reconfirmed||2022-11-04 CC||ramana at gcc dot gnu.org --- Comment #3 from Ramana Radhakrishnan --- I'd suggest moving this to Waiting given the time without a response and the correct links to documentation and that this should be covered really by arm_acle.h . Ramana
[Bug debug/53135] Duplicates cause size explosion (vta/dwarf)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53135 --- Comment #18 from Ramana Radhakrishnan --- Since the fix got installed in 2012 this really should have been fixed from 4.8.0 onwards. Should we really keep this still open or can we close this out ? Ramana
[Bug target/97726] simd intrinsics tests fail on armeb
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97726 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org --- Comment #2 from Ramana Radhakrishnan --- Fixed now ?
[Bug target/96372] [11 regression] arm/ivopts.c fails since r11-2012
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96372 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org --- Comment #4 from Ramana Radhakrishnan --- Is this now fixed ?
