http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49119
Summary: PowerPC: Wrong code with designated initializers and bit fields Product: gcc Version: 4.6.1 Status: UNCONFIRMED Severity: normal Priority: P3 Component: c AssignedTo: unassig...@gcc.gnu.org ReportedBy: sebastian.hu...@embedded-brains.de Target: powerpc-rtems4.11-gcc With GCC 4.6.1 20110513 for PowerPC with -O2 I get this: Disassembly of section .text: 00000000 <wrong_code>: 0: 38 00 00 00 li r0,0 <- This is wrong 4: 7c 10 9b a6 mtspr 624,r0 <- 8: 3d 20 00 00 lis r9,0 c: 80 09 00 04 lwz r0,4(r9) 10: 7c 11 9b a6 mtspr 625,r0 14: 3d 20 00 00 lis r9,0 18: 80 09 00 08 lwz r0,8(r9) 1c: 7c 12 9b a6 mtspr 626,r0 20: 3d 20 00 00 lis r9,0 24: 80 09 00 0c lwz r0,12(r9) 28: 7c 13 9b a6 mtspr 627,r0 2c: 7c 00 07 a4 tlbld r0 30: 4e 80 00 20 blr 00000034 <valid_code>: 34: 3c 00 10 05 lis r0,4101 <- This is valid 38: 7c 10 9b a6 mtspr 624,r0 <- 3c: 3d 20 00 00 lis r9,0 40: 80 09 00 1c lwz r0,28(r9) 44: 7c 11 9b a6 mtspr 625,r0 48: 3d 20 00 00 lis r9,0 4c: 80 09 00 20 lwz r0,32(r9) 50: 7c 12 9b a6 mtspr 626,r0 54: 3d 20 00 00 lis r9,0 58: 80 09 00 24 lwz r0,36(r9) 5c: 7c 13 9b a6 mtspr 627,r0 60: 7c 00 07 a4 tlbld r0 64: 4e 80 00 20 blr Disassembly of section .rodata: 00000000 <mmu_setup_wrong>: 0: 10 05 00 00 4: c0 00 01 00 8: 3f ff 80 0a c: 3f ff 80 0f ... 00000018 <mmu_setup_valid>: 18: 10 05 00 00 1c: c0 00 01 00 20: 3f ff 80 0a 24: 3f ff 80 0f The designated initializer .MAS0 = { .B = { .TLBSEL = 1, .ESEL = 5 } }, leads to wrong code. On the other hand .MAS0 = { .R = 0x10050000 }, leads to valid code.