[Bug rtl-optimization/78255] [5/6 regression] Indirect sibling call causing wrong code generation for ARM

[andre.simoesdiasvieira at arm dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78255

Andre Vieira  changed:

   What|Removed |Added

 CC||andre.simoesdiasvieira@arm.
   ||com

--- Comment #17 from Andre Vieira  ---
Yes, how do I change this to "verified"?

[Bug rtl-optimization/78255] [5/6 regression] Indirect sibling call causing wrong code generation for ARM

[ramana at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78255

Ramana Radhakrishnan  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 CC||ramana at gcc dot gnu.org
 Resolution|--- |FIXED

--- Comment #16 from Ramana Radhakrishnan  ---
Fixed then ?

[Bug rtl-optimization/78255] [5/6 regression] Indirect sibling call causing wrong code generation for ARM

[avieira at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78255

--- Comment #15 from avieira at gcc dot gnu.org ---
Author: avieira
Date: Wed Jan 11 15:08:25 2017
New Revision: 244319

URL: https://gcc.gnu.org/viewcvs?rev=244319=gcc=rev
Log:
PR78255: Make postreload aware of NO_FUNCTION_CSE

gcc/ChangeLog:
2017-01-11  Andre Vieira 

Backport from mainline
2016-12-09  Andre Vieira 

PR rtl-optimization/78255
* gcc/postreload.c (reload_cse_simplify): Do not CSE a function if
NO_FUNCTION_CSE is true.

gcc/testsuite/ChangeLog:
2017-01-11  Andre Vieira 

Backport from mainline
2016-12-20  Andre Vieira  

* gcc.target/arm/pr78255-2.c: Fix to work for targets
that do not optimize for tailcall.

2017-01-11  Andre Vieira 

Backport from mainline
2016-12-09  Andre Vieira 

PR rtl-optimization/78255
* gcc.target/aarch64/pr78255.c: New.
* gcc.target/arm/pr78255-1.c: New.
* gcc.target/arm/pr78255-2.c: New.

Added:
branches/gcc-5-branch/gcc/testsuite/gcc.target/aarch64/pr78255.c
branches/gcc-5-branch/gcc/testsuite/gcc.target/arm/pr78255-1.c
branches/gcc-5-branch/gcc/testsuite/gcc.target/arm/pr78255-2.c
Modified:
branches/gcc-5-branch/gcc/ChangeLog
branches/gcc-5-branch/gcc/postreload.c
branches/gcc-5-branch/gcc/testsuite/ChangeLog

[Bug rtl-optimization/78255] [5/6 regression] Indirect sibling call causing wrong code generation for ARM

[avieira at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78255

--- Comment #14 from avieira at gcc dot gnu.org ---
Author: avieira
Date: Mon Jan  9 09:58:54 2017
New Revision: 244220

URL: https://gcc.gnu.org/viewcvs?rev=244220=gcc=rev
Log:
PR78255: Make postreload aware of NO_FUNCTION_CSE

gcc/ChangeLog:
2017-01-09  Andre Vieira 

Backport from mainline
2016-12-09  Andre Vieira 

PR rtl-optimization/78255
* gcc/postreload.c (reload_cse_simplify): Do not CSE a function if
NO_FUNCTION_CSE is true.

gcc/testsuite/ChangeLog:
2017-01-09  Andre Vieira 

Backport from mainline
2016-12-20  Andre Vieira  

* gcc.target/arm/pr78255-2.c: Fix to work for targets
that do not optimize for tailcall.

2017-01-09  Andre Vieira 

Backport from mainline
2016-12-09  Andre Vieira 

PR rtl-optimization/78255
* gcc.target/aarch64/pr78255.c: New.
* gcc.target/arm/pr78255-1.c: New.
* gcc.target/arm/pr78255-2.c: New.


Added:
branches/gcc-6-branch/gcc/testsuite/gcc.target/aarch64/pr78255.c
branches/gcc-6-branch/gcc/testsuite/gcc.target/arm/pr78255-1.c
branches/gcc-6-branch/gcc/testsuite/gcc.target/arm/pr78255-2.c
Modified:
branches/gcc-6-branch/gcc/ChangeLog
branches/gcc-6-branch/gcc/postreload.c
branches/gcc-6-branch/gcc/testsuite/ChangeLog