[Bug rtl-optimization/84527] missed optimization for special ternary operation
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84527 Kai Tietz changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|--- |INVALID --- Comment #6 from Kai Tietz --- ah, right. sorry for the noise. thanks for pointing out
[Bug rtl-optimization/84527] missed optimization for special ternary operation
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84527 --- Comment #5 from Jakub Jelinek --- No, signed comparison is very different from unsigned comparison, and only unsigned comparison < is usable for this. Borrow flag reflects unsigned signed comparison result rather than signed.
[Bug rtl-optimization/84527] missed optimization for special ternary operation
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84527 --- Comment #4 from Kai Tietz --- (In reply to Jakub Jelinek from comment #3) > ..., but that just means it is not the right code for f1 and f3. Right, that produced code depends on the sign of the condition arguments seems to be pretty wrong
[Bug rtl-optimization/84527] missed optimization for special ternary operation
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84527
Jakub Jelinek changed:
What|Removed |Added
CC||jakub at gcc dot gnu.org
--- Comment #3 from Jakub Jelinek ---
Indeed:
int f1 (int a, int b) { return a < b ? -1 : 1; }
int f2 (unsigned a, unsigned b) { return a < b ? -1 : 1; }
unsigned f3 (int a, int b) { return a < b ? -1 : 1; }
unsigned f4 (unsigned a, unsigned b) { return a < b ? -1 : 1; }
shows that we emit the code you want to see for f2 and f4, but that just means
it is not the right code for f1 and f3.
[Bug rtl-optimization/84527] missed optimization for special ternary operation
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84527 --- Comment #2 from Uroš Bizjak --- Try with the unsigned arguments.
[Bug rtl-optimization/84527] missed optimization for special ternary operation
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84527 --- Comment #1 from Kai Tietz --- For x86 we produce for sample: movl8(%esp), %eax cmpl%eax, 4(%esp) setge %al movzbl %al, %eax leal-1(%eax,%eax), %eax ret which could be expressed with one instruction less as movl4(%esp), %eax cmpl%eax, 8(%esp) sbbl%eax, %eax orb $1, %al ret
