[Bug rtl-optimization/85160] GCC generates mvn/and instructions instead of bic on aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85160 Segher Boessenkool changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug rtl-optimization/85160] GCC generates mvn/and instructions instead of bic on aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85160 --- Comment #5 from Segher Boessenkool --- Author: segher Date: Mon Jul 30 16:11:44 2018 New Revision: 263072 URL: https://gcc.gnu.org/viewcvs?rev=263072=gcc=rev Log: testcase for 2-2 combine gcc/testsuite/ PR rtl-optimization/85160

[Bug rtl-optimization/85160] GCC generates mvn/and instructions instead of bic on aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85160 --- Comment #4 from Segher Boessenkool --- Author: segher Date: Mon Jul 30 13:18:17 2018 New Revision: 263067 URL: https://gcc.gnu.org/viewcvs?rev=263067=gcc=rev Log: combine: Allow combining two insns to two insns This patch allows combine to

[Bug rtl-optimization/85160] GCC generates mvn/and instructions instead of bic on aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85160 Segher Boessenkool changed: What|Removed |Added Status|NEW |ASSIGNED

[Bug rtl-optimization/85160] GCC generates mvn/and instructions instead of bic on aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85160 Andrew Pinski changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug rtl-optimization/85160] GCC generates mvn/and instructions instead of bic on aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85160 Richard Biener changed: What|Removed |Added CC||segher at gcc dot gnu.org