--- Comment #12 from rdsandiford at googlemail dot com 2008-09-08 19:48
---
Subject: Re: gcc moves an expensive instruction outside of a conditional
daney at gcc dot gnu dot org [EMAIL PROTECTED] writes:
Can we close this now?
I think it is fixed.
Sorry, this is still on the
--- Comment #11 from daney at gcc dot gnu dot org 2008-09-07 17:32 ---
Can we close this now?
I think it is fixed.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=28126
--- Comment #10 from anemo at mba dot ocn dot ne dot jp 2006-08-05 15:48
---
(In reply to comment #9)
Created an attachment (id=12010)
-- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=12010action=view) [edit]
A hackish fix
I tried gcc 4.1 with this patch and compiled glibc 2.4.
--- Comment #9 from rsandifo at gcc dot gnu dot org 2006-08-03 21:06
---
Created an attachment (id=12010)
-- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=12010action=view)
A hackish fix
I agree with Kaz that a blockage would be a correct fix here.
I'm just worried about the
--- Comment #8 from rsandifo at gcc dot gnu dot org 2006-07-30 10:56
---
Subject: Bug 28126
Author: rsandifo
Date: Sun Jul 30 10:56:07 2006
New Revision: 115819
URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=115819
Log:
gcc/
2006-07-25 Atsushi Nemoto [EMAIL PROTECTED]
--- Comment #7 from anemo at mba dot ocn dot ne dot jp 2006-07-21 16:34
---
(In reply to comment #6)
Thanks. With this patch, gcc 4.1.1 produces expected output.
It seems gcc 4.2 does not move rdhwr before branch without this patch, but I
can not see why.
I tried to find the
--- Comment #5 from anemo at mba dot ocn dot ne dot jp 2006-07-13 14:42
---
Created an attachment (id=11881)
-- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=11881action=view)
do not put rdhwr instruction on delay slot
With this patch, gcc 4.2 (with -O1, -O2) and gcc 4.1.1 with -O1
--- Comment #6 from anemo at mba dot ocn dot ne dot jp 2006-07-13 14:58
---
(In reply to comment #2)
Although I don't know much about the instruction scheduling, I had
a similar problem on SH and it was workarounded with emitting blockage
insns. The patch below might work for you,
--- Comment #4 from drow at gcc dot gnu dot org 2006-07-12 16:08 ---
(In reply to comment #3)
Is it OK to add (set_attr can_delay no) for tls_get_tp_mode
definition?
I think so, with suitable comment. Some future MIPS architecture may provide a
register for this, in which case the
--- Comment #3 from anemo at mba dot ocn dot ne dot jp 2006-07-06 16:20
---
Subject: Re: gcc moves an expensive instruction outside
of a conditional
One note: I think rdhwr $v1, $29 should not be placed in delay slot
anyway. The instruction always generate an exception, so if it
--- Comment #1 from daney at gcc dot gnu dot org 2006-06-21 16:33 ---
Confirmed on: mipsel-linux-gcc (GCC) 4.2.0 20060605 (experimental)
cross compiler configured as:
../gcc/configure --target=mipsel-linux
--with-sysroot=/usr/local/mipsel-linux-test
--- Comment #2 from kkojima at gcc dot gnu dot org 2006-06-22 04:16 ---
Although I don't know much about the instruction scheduling, I had
a similar problem on SH and it was workarounded with emitting blockage
insns. The patch below might work for you, though I'm not sure if
it's the
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