This testcase int array1[100], array2[100]; long long sub (int max) { int k; long long total = 0;
for (k = 0; k < max; k++) total += (long long)array1[k] * (long long)array2[k]; return total; } Generates a macc instruction with gcc-3.4.5 when compiled with -O2 -march=sr71000 -mabi=32 -mgp32. This does not generate a macc instruction with gcc-4.0.0. The difference is that the 32-bit adddi3 pattern was deleted in between gcc-3.4.5 and gcc-4.0.0. So gcc-3.4.5 generates a 2 insn rtl sequence which is trivial to combine into a multiply-add insn. But gcc-4.0.0 generates a 5 insn rtl sequence which will not be combined. I noticed this on mainline because I should be able to generate widening multiply-accumulate instructions (madd) with a mipsisa32r2 target with the same testcase, but I can't. -- Summary: suboptimal MIPS widening multiply accumulate Product: gcc Version: 4.6.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target AssignedTo: unassigned at gcc dot gnu dot org ReportedBy: wilson at gcc dot gnu dot org GCC target triplet: mips*-*-* http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43902