[Bug target/71977] powerpc64: Use VSR when operating on float and integer

2017-09-18 Thread meissner at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71977 --- Comment #9 from Michael Meissner --- Author: meissner Date: Mon Sep 18 22:47:49 2017 New Revision: 252956 URL: https://gcc.gnu.org/viewcvs?rev=252956=gcc=rev Log: Refix pr 71977 Modified: branches/ibm/xscvdpsp/gcc/ChangeLog.meissner

[Bug target/71977] powerpc64: Use VSR when operating on float and integer

2017-01-10 Thread meissner at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71977 Bug 71977 depends on bug 70568, which changed state. Bug 70568 Summary: [5/6/7 regression] PowerPC64: union of floating and fixed doesn't use POWER8 GPR/VSR moves https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70568 What|Removed

[Bug target/71977] powerpc64: Use VSR when operating on float and integer

2017-01-10 Thread meissner at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71977 Michael Meissner changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/71977] powerpc64: Use VSR when operating on float and integer

2017-01-10 Thread meissner at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71977 Michael Meissner changed: What|Removed |Added Attachment #40494|0 |1 is obsolete|

[Bug target/71977] powerpc64: Use VSR when operating on float and integer

2017-01-10 Thread meissner at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71977 --- Comment #6 from Michael Meissner --- Author: meissner Date: Tue Jan 10 17:44:17 2017 New Revision: 244279 URL: https://gcc.gnu.org/viewcvs?rev=244279=gcc=rev Log: [gcc] 2017-01-10 Michael Meissner

[Bug target/71977] powerpc64: Use VSR when operating on float and integer

2017-01-10 Thread meissner at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71977 --- Comment #5 from Michael Meissner --- Created attachment 40494 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=40494=edit Back port of patch to fix problem on GCC 6 branch While it has been decided not to apply this improvement to the

[Bug target/71977] powerpc64: Use VSR when operating on float and integer

2017-01-04 Thread meissner at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71977 --- Comment #4 from Michael Meissner --- Author: meissner Date: Thu Jan 5 00:43:53 2017 New Revision: 244084 URL: https://gcc.gnu.org/viewcvs?rev=244084=gcc=rev Log: [gcc] 2017-01-04 Michael Meissner PR

[Bug target/71977] powerpc64: Use VSR when operating on float and integer

2016-12-29 Thread meissner at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71977 --- Comment #3 from Michael Meissner --- Created attachment 40431 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=40431=edit Proposed patch to fix the problem

[Bug target/71977] powerpc64: Use VSR when operating on float and integer

2016-12-29 Thread meissner at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71977 Michael Meissner changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug target/71977] powerpc64: Use VSR when operating on float and integer

2016-12-05 Thread bergner at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71977 --- Comment #2 from Peter Bergner --- (In reply to Michael Meissner from comment #1) > Note in terms of the code in general, you have to make sure that the float > value is converted to vector form before you do AND/OR/etc. on it. This is >

[Bug target/71977] powerpc64: Use VSR when operating on float and integer

2016-12-05 Thread meissner at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71977 --- Comment #1 from Michael Meissner --- Unfortunately, the code gets even worse if you use -mcpu=power9: .L.mask_float: stfs 1,-16(1) lwz 9,-16(1) and 4,4,9 stw 4,-16(1) lfs 1,-16(1) blr I.e.

[Bug target/71977] powerpc64: Use VSR when operating on float and integer

2016-07-22 Thread pinskia at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71977 Andrew Pinski changed: What|Removed |Added Severity|normal |enhancement