https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82303
Bug ID: 82303 Summary: Better PIE/PIC code generation for kernel code (x86_64 & arm64) Product: gcc Version: unknown Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: thgarnie at google dot com Target Milestone: --- The current PIE/PIC code generation is not optimal for kernel code. It makes inferences about the execution environment which do not hold for freestanding executables such as the Linux kernel, regarding the need to avoid text relocations, to minimize the footprint of CoWed pages, and to always refer to exported symbols via the GOT so they can be preempted. None of these concerns apply to freestanding binaries. Having a separate flag (like mcmodel=kernel-pie or -fkernel-pie) would allow better code optimization for PIE/PIC kernel code, notably: - Select the right segment register for TLS on kernel code (For example x86_64 use gs instead of fs [1]). - No need for GOT or PLT. - Re-enable code optimizations disabled for COW pages support, trying to reduce relocations to code sections. For example, switch are not folded for PIE/PIC code to avoid relocations [2]. Note that arm64 PIE uses the small or tiny mcmodel based on UEFI so it should be taken in considerations for this architecture. For reference the discussion on Linux kernel x86_64 PIE RFC: http://www.openwall.com/lists/kernel-hardening/2017/09/21/16 [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81708 [2] https://github.com/gcc-mirror/gcc/blob/7977b0509f07e42fbe0f06efcdead2b7e4a5135f/gcc/tree-switch-conversion.c#L828