[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-16 Thread lloyd at randombit dot net
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #17 from Jack Lloyd --- Thank you!

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-16 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 Jakub Jelinek changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-14 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #15 from Jakub Jelinek --- Author: jakub Date: Sat Oct 14 18:48:38 2017 New Revision: 253761 URL: https://gcc.gnu.org/viewcvs?rev=253761=gcc=rev Log: PR middle-end/62263 PR middle-end/82498 *

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-14 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #14 from Jakub Jelinek --- Author: jakub Date: Sat Oct 14 18:47:14 2017 New Revision: 253760 URL: https://gcc.gnu.org/viewcvs?rev=253760=gcc=rev Log: PR middle-end/62263 PR middle-end/82498 *

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-13 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #13 from Jakub Jelinek --- Author: jakub Date: Fri Oct 13 07:28:46 2017 New Revision: 253709 URL: https://gcc.gnu.org/viewcvs?rev=253709=gcc=rev Log: PR target/82498 * fold-const.c (fold_binary_loc) : Code cleanups,

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-13 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #12 from Jakub Jelinek --- Author: jakub Date: Fri Oct 13 07:17:06 2017 New Revision: 253708 URL: https://gcc.gnu.org/viewcvs?rev=253708=gcc=rev Log: PR target/82498 * config/i386/ia32intrin.h (__rold, __rord,

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-12 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #11 from Jakub Jelinek --- Author: jakub Date: Thu Oct 12 19:10:34 2017 New Revision: 253695 URL: https://gcc.gnu.org/viewcvs?rev=253695=gcc=rev Log: PR target/82498 * config/i386/i386.md (*ashl3_mask_1,

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-12 Thread glisse at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #10 from Marc Glisse --- f1...f6 already have a LROTATE_EXPR in the .original dump. The others don't get one until forwprop1, which is after einline, so there is a small chance of inlining causing other optimizations that mess with

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-12 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #9 from Jakub Jelinek --- Created attachment 42343 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=42343=edit gcc8-pr82498-intrin.patch Untested patch to fix the intrinsics.

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-12 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #8 from Jakub Jelinek --- (In reply to Uroš Bizjak from comment #6) > (In reply to Jack Lloyd from comment #5) > > Jakub thank you very much for your comments, this was helpful for me in > > getting consistent rol/ror generation. > >

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-12 Thread glisse at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #7 from Marc Glisse --- (In reply to Uroš Bizjak from comment #6) > You can use __rol{b,w,d,q} and __ror{b,w,d,q} (and their aliases) from > ia32intrin.h. These are standardized; you have to include x86intrin.h header. Some of those

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-12 Thread ubizjak at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #6 from Uroš Bizjak --- (In reply to Jack Lloyd from comment #5) > Jakub thank you very much for your comments, this was helpful for me in > getting consistent rol/ror generation. > > Speaking as a user it's frustrating that Clang

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-11 Thread lloyd at randombit dot net
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #5 from Jack Lloyd --- Jakub thank you very much for your comments, this was helpful for me in getting consistent rol/ror generation. Speaking as a user it's frustrating that Clang and GCC don't just have a builtin for rotations

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-11 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #4 from Jakub Jelinek --- Two further cases: unsigned f10 (unsigned x, unsigned char y) { y %= __CHAR_BIT__ * __SIZEOF_INT__; return (x << y) | (x >> (-y & ((__CHAR_BIT__ * __SIZEOF_INT__) - 1))); } unsigned f11 (unsigned x,

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-11 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 --- Comment #3 from Jakub Jelinek --- Not to mention that the #c0 code has undefined behavior if rot is not 0, but a multiple of 8 * sizeof(uint32_t), like 32, 64, ... If you insisted on the rot == 0 check it would need to be done after the the

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-11 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 Jakub Jelinek changed: What|Removed |Added CC||jakub at gcc dot gnu.org --- Comment #2

[Bug target/82498] Missed optimization for x86 rotate instruction

2017-10-10 Thread glisse at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82498 Marc Glisse changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|