[Bug target/88469] [7/8 regression] AAPCS - Struct with 64-bit bitfield may be passed in wrong registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88469 --- Comment #10 from Richard Earnshaw --- Author: rearnsha Date: Thu Jan 24 16:10:06 2019 New Revision: 268241 URL: https://gcc.gnu.org/viewcvs?rev=268241=gcc=rev Log: Mitigation for PR target/88469 on arm-based systems bootstrapping with gcc-6/7/8 This patch, for gcc 8/9 is a mitigation patch for PR target/88469 where gcc-6/7/8 miscompile a structure whose alignment is dominated by a 64-bit bitfield member. Since the PCS rules for such a type must ignore any overalignment of the base type we cannot address this by simply adding a larger alignment to the class. We can, however, force the alignment of the bit-field itself and GCC will handle that as desired. PR target/88469 * profile-count.h (profile_count): On ARM systems using GCC 6/7/8 force the alignment of m_val. Modified: branches/gcc-8-branch/gcc/ChangeLog branches/gcc-8-branch/gcc/profile-count.h
[Bug target/88469] [7/8 regression] AAPCS - Struct with 64-bit bitfield may be passed in wrong registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88469 --- Comment #9 from Richard Earnshaw --- Author: rearnsha Date: Thu Jan 24 16:06:34 2019 New Revision: 268240 URL: https://gcc.gnu.org/viewcvs?rev=268240=gcc=rev Log: Mitigation for PR target/88469 on arm-based systems bootstrapping with gcc-6/7/8 This patch, for gcc 8/9 is a mitigation patch for PR target/88469 where gcc-6/7/8 miscompile a structure whose alignment is dominated by a 64-bit bitfield member. Since the PCS rules for such a type must ignore any overalignment of the base type we cannot address this by simply adding a larger alignment to the class. We can, however, force the alignment of the bit-field itself and GCC will handle that as desired. PR target/88469 * profile-count.h (profile_count): On ARM systems using GCC 6/7/8 force the alignment of m_val. Modified: trunk/gcc/ChangeLog trunk/gcc/profile-count.h
[Bug target/88469] [7/8 regression] AAPCS - Struct with 64-bit bitfield may be passed in wrong registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88469 --- Comment #8 from Richard Earnshaw --- Author: rearnsha Date: Tue Jan 22 17:56:02 2019 New Revision: 268160 URL: https://gcc.gnu.org/viewcvs?rev=268160=gcc=rev Log: [arm] Further fixes for PR88469 A bitfield that is exactly the same size as an integral type and naturally aligned will have DECL_BIT_FIELD cleared. So we need to check DECL_BIT_FIELD_TYPE to be sure whether or not the underlying type was declared with a bitfield declaration. I've also added a test for bitfields that are based on overaligned types. PR target/88469 gcc: * config/arm/arm.c (arm_needs_double_word_align): Check DECL_BIT_FIELD_TYPE. gcc/testsuite: * gcc.target/arm/aapcs/bitfield2.c: New test. * gcc.target/arm/aapcs/bitfield3.c: New test. Added: trunk/gcc/testsuite/gcc.target/arm/aapcs/bitfield2.c trunk/gcc/testsuite/gcc.target/arm/aapcs/bitfield3.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/arm/arm.c trunk/gcc/testsuite/ChangeLog
[Bug target/88469] [7/8 regression] AAPCS - Struct with 64-bit bitfield may be passed in wrong registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88469 Richard Earnshaw changed: What|Removed |Added Summary|[7/8/9 regression] AAPCS - |[7/8 regression] AAPCS - |Struct with 64-bit bitfield |Struct with 64-bit bitfield |may be passed in wrong |may be passed in wrong |registers |registers --- Comment #7 from Richard Earnshaw --- Fixed on trunk. Still need mitigation for gcc-7/8 and to deal with boostrapping gcc-9 with gcc-6/7/8.
