https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94298
--- Comment #5 from Vladimir Makarov ---
I think that the root of the problem is that IRA on register cost calculation
sub-pass chooses memory for the pseudo.
It happens because the current algorithm (which is just an adoption of old
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94298
--- Comment #4 from rguenther at suse dot de ---
On Tue, 24 Mar 2020, ubizjak at gmail dot com wrote:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94298
>
> --- Comment #3 from Uroš Bizjak ---
> (In reply to rguent...@suse.de from comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94298
--- Comment #3 from Uroš Bizjak ---
(In reply to rguent...@suse.de from comment #2)
> So I wonder whether the bug is that there is a memory alternative
> in the first place?
Memory alternative should be OK, we do have insns that access memory.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94298
--- Comment #2 from rguenther at suse dot de ---
On Tue, 24 Mar 2020, ubizjak at gmail dot com wrote:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94298
>
> --- Comment #1 from Uroš Bizjak ---
> The situation is a bit more complicated. IRA
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94298
--- Comment #1 from Uroš Bizjak ---
The situation is a bit more complicated. IRA DTRT:
8: r85:V2DF=[r86:DI+`y']
REG_EQUIV [r86:DI+`y']
11: r89:V2DF=vec_select(vec_concat(r85:V2DF,r85:V2DF),parallel)
12:
