[Bug target/95355] [11 Regression] Assembler messages: Error: operand size mismatch for `vpmovzxbd' with -masm=intel since r11-485-gf6e40195ec3d3b402a5f6c58dbf359479bc4cbfa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95355 Uroš Bizjak changed: What|Removed |Added Target Milestone|11.0|10.2 Resolution|--- |FIXED Status|NEW |RESOLVED --- Comment #10 from Uroš Bizjak --- (In reply to Martin Liška from comment #5) > Can the bug be marked as resolved? Yes, this particular problem is fixed for gcc-10.2+.
[Bug target/95355] [11 Regression] Assembler messages: Error: operand size mismatch for `vpmovzxbd' with -masm=intel since r11-485-gf6e40195ec3d3b402a5f6c58dbf359479bc4cbfa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95355 --- Comment #9 from Uroš Bizjak --- (In reply to CVS Commits from comment #8) > The master branch has been updated by Uros Bizjak : Bah. Wrong PR reference, should be PR96189.
[Bug target/95355] [11 Regression] Assembler messages: Error: operand size mismatch for `vpmovzxbd' with -masm=intel since r11-485-gf6e40195ec3d3b402a5f6c58dbf359479bc4cbfa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95355 --- Comment #8 from CVS Commits --- The master branch has been updated by Uros Bizjak : https://gcc.gnu.org/g:6c2848ad02feef5ac094d1158be3861819b3bb49 commit r11-2140-g6c2848ad02feef5ac094d1158be3861819b3bb49 Author: Uros Bizjak Date: Wed Jul 15 21:27:00 2020 +0200 i386: Introduce peephole2 to use flags from CMPXCHG more [PR96189] CMPXCHG instruction sets ZF flag if the values in the destination operand and EAX register are equal; otherwise the ZF flag is cleared and value from destination operand is loaded to EAX. Following assembly: movl%esi, %eax lock cmpxchgl %edx, (%rdi) cmpl%esi, %eax sete%al can be optimized by removing the unneeded comparison, since set ZF flag signals that no update to EAX happened. 2020-15-07 Uroš Bizjak gcc/ChangeLog: PR target/95355 * config/i386/sync.md (peephole2 to remove unneded compare after CMPXCHG): New pattern. gcc/testsuite/ChangeLog: PR target/95355 * gcc.target/i386/pr96189.c: New test.
[Bug target/95355] [11 Regression] Assembler messages: Error: operand size mismatch for `vpmovzxbd' with -masm=intel since r11-485-gf6e40195ec3d3b402a5f6c58dbf359479bc4cbfa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95355 Thomas Koenig changed: What|Removed |Added CC||tkoenig at gcc dot gnu.org --- Comment #6 from CVS Commits --- The master branch has been updated by Thomas Kथà¤nig : https://gcc.gnu.org/g:5958b926dcc3332aec0a2e34653c4394d2613401 commit r11-1729-g5958b926dcc3332aec0a2e34653c4394d2613401 Author: Thomas Koenig Date: Tue Jun 30 13:01:36 2020 +0200 Use CHARACTER(kind) string for calculating the type hash. This regression came about because of a change in the way types are displayed in error messages. The character representation is also used to calculate the hashes for our types, so this patch restores the old behavior if we are indeed calculating a hash. The test case also checks for the specific hash value because changing that would be an ABI change, which we should not be doing unintentionally. gcc/fortran/ChangeLog: 2020-06-30 Thomas Koenig PR fortran/95355 * gfortran.h (gfc_typename): Add optional argument for_hash. * misc.c (gfc_typename): When for_hash is true, just retur CHARACTER(kind). * class.c (gfc_intrinsic_hash_value): Call gfc_typename with for_hash = true. --- Comment #7 from Thomas Koenig --- (In reply to CVS Commits from comment #6) > The master branch has been updated by Thomas Kथà¤nig : That last commit was for PR 95366.
[Bug target/95355] [11 Regression] Assembler messages: Error: operand size mismatch for `vpmovzxbd' with -masm=intel since r11-485-gf6e40195ec3d3b402a5f6c58dbf359479bc4cbfa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95355 --- Comment #5 from Martin Liška --- Can the bug be marked as resolved?
[Bug target/95355] [11 Regression] Assembler messages: Error: operand size mismatch for `vpmovzxbd' with -masm=intel since r11-485-gf6e40195ec3d3b402a5f6c58dbf359479bc4cbfa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95355 --- Comment #4 from CVS Commits --- The releases/gcc-10 branch has been updated by Uros Bizjak : https://gcc.gnu.org/g:31d827e98ab32060ef522fa5f3e42c1175e1a439 commit r10-8198-g31d827e98ab32060ef522fa5f3e42c1175e1a439 Author: Uros Bizjak Date: Thu May 28 13:56:54 2020 +0200 i386: Remove %q modifier from two pmov insn templates [PR95355] 2020-05-28 Uroš Bizjak gcc/ChangeLog: PR target/95355 * config/i386/sse.md (avx512f_v16qiv16si2): Remove %q operand modifier from insn template. (avx512f_v8hiv8di2): Ditto. gcc/testsuite/ChangeLog: PR target/95355 * gcc.target/i386/pr95355.c: New test.
[Bug target/95355] [11 Regression] Assembler messages: Error: operand size mismatch for `vpmovzxbd' with -masm=intel since r11-485-gf6e40195ec3d3b402a5f6c58dbf359479bc4cbfa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95355 --- Comment #3 from CVS Commits --- The master branch has been updated by Uros Bizjak : https://gcc.gnu.org/g:7d014acc1ea263df7ed44aa6cb7f75bb8e512aed commit r11-669-g7d014acc1ea263df7ed44aa6cb7f75bb8e512aed Author: Uros Bizjak Date: Wed May 27 21:02:51 2020 +0200 i386: Remove %q modifier from two pmov insn templates [PR95355] 2020-05-27 Uroš Bizjak gcc/ChangeLog: PR target/95355 * config/i386/sse.md (avx512f_v16qiv16si2): Remove %q operand modifier from insn template. (avx512f_v8hiv8di2): Ditto. gcc/testsuite/ChangeLog: PR target/95355 * gcc.target/i386/pr95355.c: New test.
[Bug target/95355] [11 Regression] Assembler messages: Error: operand size mismatch for `vpmovzxbd' with -masm=intel since r11-485-gf6e40195ec3d3b402a5f6c58dbf359479bc4cbfa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95355
--- Comment #2 from Uroš Bizjak ---
This is pre-exsisting problem.
There are a couple of wrong %q modifiers in vpmov* insn templates:
--cut here--
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index fde65391d7d..1cf1b8cea3b 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -17559,7 +17559,7 @@
(any_extend:V16SI
(match_operand:V16QI 1 "nonimmediate_operand" "vm")))]
"TARGET_AVX512F"
- "vpmovbd\t{%1, %0|%0, %q1}"
+ "vpmovbd\t{%1, %0|%0, %1}"
[(set_attr "type" "ssemov")
(set_attr "prefix" "evex")
(set_attr "mode" "XI")])
@@ -17935,7 +17935,7 @@
(any_extend:V8DI
(match_operand:V8HI 1 "nonimmediate_operand" "vm")))]
"TARGET_AVX512F"
- "vpmovwq\t{%1, %0|%0, %q1}"
+ "vpmovwq\t{%1, %0|%0, %1}"
[(set_attr "type" "ssemov")
(set_attr "prefix" "evex")
(set_attr "mode" "XI")])
--cut here--
[Bug target/95355] [11 Regression] Assembler messages: Error: operand size mismatch for `vpmovzxbd' with -masm=intel since r11-485-gf6e40195ec3d3b402a5f6c58dbf359479bc4cbfa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95355 Martin Liška changed: What|Removed |Added CC||marxin at gcc dot gnu.org, ||uros at gcc dot gnu.org Status|UNCONFIRMED |NEW Last reconfirmed||2020-05-27 Ever confirmed|0 |1 Summary|[11 Regression] Assembler |[11 Regression] Assembler |messages: Error: operand|messages: Error: operand |size mismatch for |size mismatch for |`vpmovzxbd' with|`vpmovzxbd' with |-masm=intel |-masm=intel since ||r11-485-gf6e40195ec3d3b402a ||5f6c58dbf359479bc4cbfa Priority|P3 |P1 --- Comment #1 from Martin Liška --- Started with r11-485-gf6e40195ec3d3b402a5f6c58dbf359479bc4cbfa.
