[Bug target/91441] ICE in asan_shadow_offset at asan.c:342 on riscv64 target

2019-08-18 Thread kito at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91441 --- Comment #2 from kito at gcc dot gnu.org --- Author: kito Date: Mon Aug 19 03:21:44 2019 New Revision: 274631 URL: https://gcc.gnu.org/viewcvs?rev=274631=gcc=rev Log: PR target/91441 - Turn off -fsanitize=kernel-address

[Bug target/91441] ICE in asan_shadow_offset at asan.c:342 on riscv64 target

2019-08-18 Thread kito at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91441 kito at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED CC

[Bug target/91635] wrong code at -O2 with __builtin_add_overflow() and shifts

2019-09-03 Thread kito at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91635 --- Comment #12 from Kito Cheng --- Hi Zdenek: I can reproduce for all new 3 testcases, it seems like cause by same issue, thanks you provide more testcase for that!

[Bug target/91635] wrong code at -O2 with __builtin_add_overflow() and shifts

2019-09-03 Thread kito at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91635 --- Comment #5 from Kito Cheng --- Hi Zdenek: Could you share more testcase? I've a patch is based on Jakub's one. Thanks :)

[Bug target/91635] wrong code at -O2 with __builtin_add_overflow() and shifts

2019-09-03 Thread kito at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91635 --- Comment #7 from Kito Cheng --- Hi Jakub: > that doesn't mean paradoxical subregs can't appear there, just it will be > less likely. Does it mean paradoxical subregs will appear during intermediate result even after reload, so for such

[Bug target/91635] wrong code at -O2 with __builtin_add_overflow() and shifts

2019-09-04 Thread kito at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91635 --- Comment #17 from Kito Cheng --- Hi Jakub: Thanks your patch, I've run with gcc testsuite and no new fails, and I am ruining more gcc testsuite regression with different arch/abi combination for that. I am amazing that seems like RISC-V is

[Bug target/91635] wrong code at -O2 with __builtin_add_overflow() and shifts

2019-09-19 Thread kito at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91635 --- Comment #26 from Kito Cheng --- Author: kito Date: Thu Sep 19 06:38:23 2019 New Revision: 275929 URL: https://gcc.gnu.org/viewcvs?rev=275929=gcc=rev Log: RISC-V: Fix bad insn splits with paradoxical subregs. Shifting by more than the size

[Bug target/91683] ICE: SIGSEGV at -O when compiling for riscv64

2019-09-20 Thread kito at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91683 --- Comment #21 from Kito Cheng --- Author: kito Date: Fri Sep 20 10:41:51 2019 New Revision: 275997 URL: https://gcc.gnu.org/viewcvs?rev=275997=gcc=rev Log: RISC-V: Fix more splitters accidentally calling gen_reg_rtx. PR target/91683