[Bug target/69619] [6 Regression] compilation doesn't terminate during CCMP expansion

2016-02-04 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69619 --- Comment #6 from wilco at gcc dot gnu.org --- Author: wilco Date: Thu Feb 4 18:23:35 2016 New Revision: 233145 URL: https://gcc.gnu.org/viewcvs?rev=233145=gcc=rev Log: This patch fixes an exponential issue in ccmp.c. When deciding which

[Bug rtl-optimization/79149] bad optimization on MIPS and ARM leading to excessive stack usage in some cases

2017-02-07 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79149 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug target/78439] [7 Regression] error: insn does not satisfy its constraints (arm-linux-gnueabihf)

2017-02-02 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78439 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug rtl-optimization/79149] bad optimization on MIPS and ARM leading to excessive stack usage in some cases

2017-02-08 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79149 --- Comment #14 from wilco at gcc dot gnu.org --- (In reply to Arnd Bergmann from comment #13) > (In reply to wilco from comment #12) > > Does wp512 use 64-bit types? If so, this is likely PR77308. > > Yes, as seen in the attachme

[Bug target/71399] [5/6/7 Regression] 5.3.0 bootstrap comparison failure on arm-linux-gnueabihf

2017-01-24 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71399 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug target/78041] Wrong code on ARMv7 with -mthumb -mfpu=neon-fp16 -O0

2017-01-24 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041 --- Comment #19 from wilco at gcc dot gnu.org --- Author: wilco Date: Tue Jan 24 14:14:12 2017 New Revision: 244872 URL: https://gcc.gnu.org/viewcvs?rev=244872=gcc=rev Log: With -fpu=neon DI mode shifts are expanded after reload. DI mode

[Bug target/78041] Wrong code on ARMv7 with -mthumb -mfpu=neon-fp16 -O0

2017-01-24 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041 wilco at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution

[Bug middle-end/77484] [6/7 Regression] Static branch predictor causes ~6-8% regression of SPEC2000 GAP

2017-01-19 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484 --- Comment #33 from wilco at gcc dot gnu.org --- (In reply to Jan Hubicka from comment #32) > Apparently fixed. The coremark is PR77445 Yes, my SPEC2006 results look good, no real change. Coremark is now up by 20% or more, thanks for that :-)

[Bug rtl-optimization/79121] [6/7 Regression] invalid expansion of sign-extend unsigned plus left shift

2017-01-17 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79121 wilco at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed

[Bug middle-end/77484] [6/7 Regression] Static branch predictor causes ~6-8% regression of SPEC2000 GAP

2017-01-16 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484 --- Comment #27 from wilco at gcc dot gnu.org --- (In reply to Jan Hubicka from comment #26) > Hello, did the Gap scores on arm too? Both Itanium and PPC testers seems to > show improved gap scores, so hope arm and the other ppc test

[Bug target/77455] [AArch64] eh_return implementation fails

2017-01-20 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77455 wilco at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution

[Bug target/77455] [AArch64] eh_return implementation fails

2017-01-20 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77455 --- Comment #3 from wilco at gcc dot gnu.org --- Author: wilco Date: Fri Jan 20 15:34:41 2017 New Revision: 244724 URL: https://gcc.gnu.org/viewcvs?rev=244724=gcc=rev Log: This patch simplifies the handling of EH return. We force the use

[Bug target/77455] [AArch64] eh_return implementation fails

2017-01-19 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77455 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-10-26 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #20 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #19) > I think the problem with anddi iordi and xordi instructions is that > they obscure the data flow between low and high half words.

[Bug target/78041] Wrong code on ARMv7 with -mthumb -mfpu=neon-fp16 -O0

2016-10-25 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041 --- Comment #17 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #15) > FYI: You could merge the two alternatives into one. > > =?r,? > 0, r > i, i > > is equivalent to > > =? &g

[Bug target/78041] Wrong code on ARMv7 with -mthumb -mfpu=neon-fp16 -O0

2016-10-25 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041 --- Comment #16 from wilco at gcc dot gnu.org --- Author: wilco Date: Tue Oct 25 10:25:28 2016 New Revision: 241508 URL: https://gcc.gnu.org/viewcvs?rev=241508=gcc=rev Log: With -fpu=neon DI mode shifts are expanded after reload. DI mode

[Bug target/78041] Wrong code on ARMv7 with -mthumb -mfpu=neon-fp16 -O0

2016-10-25 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug bootstrap/78453] arm-none-linux-gnueabihf bootstrap failed with revision 242549

2016-11-21 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78453 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-11-01 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #35 from wilco at gcc dot gnu.org --- (In reply to Richard Earnshaw from comment #30) > (In reply to wilco from comment #29) > > Combine could help with > > merging 2 loads/stores into a single instruction. > &

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-11-01 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #36 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #34) > (In reply to Richard Earnshaw from comment #33) > > (In reply to Wilco from comment #32) > > > (In reply to Bernd Edlinge

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-11-01 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #41 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #40) > BTW: I found something strange in this pattern in neon.md: > > (define_insn_and_split "orndi3_neon" > [(s

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-11-01 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #42 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #40) > BTW: I found something strange in this pattern in neon.md: > > (define_insn_and_split "orndi3_neon" > [(s

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-11-01 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #44 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #38) > Created attachment 39939 [details] > proposed patch, v2 > > Unlike the previous patch, thumb1 stack usage stays at 1588 bytes, >

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-11-01 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #47 from wilco at gcc dot gnu.org --- (In reply to Richard Earnshaw from comment #46) > (In reply to wilco from comment #44) > > (In reply to Bernd Edlinger from comment #38) > > > Created attachment 39939 [detai

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-11-02 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #51 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #49) > (In reply to Bernd Edlinger from comment #48) > > (In reply to wilco from comment #22) > > > > > > Anyway, there is

[Bug tree-optimization/61056] strchr (x, 0) is not converted to strlen (x)

2016-11-02 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61056 wilco at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED CC

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-10-27 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #22 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #21) > (In reply to wilco from comment #20) > > > Wilco, where have you seen the additional registers used with my > > > previous pa

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-10-31 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #29 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #28) > With my latest patch I bootstrapped a configuration with > --with-arch=armv7-a --with-tune=cortex-a9 --with-fpu=vfpv3-d16 > --with-float=ha

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-11-03 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #55 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #39) > Created attachment 39940 [details] > proposed patch, v2 > > last upload was accidentally truncated. > uploaded the right patch. R

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-11-03 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #57 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #56) > (In reply to wilco from comment #55) > > (In reply to Bernd Edlinger from comment #39) > > > Created attachment 39940 [details] &g

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-11-03 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #59 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #58) > (In reply to wilco from comment #57) > > (In reply to Bernd Edlinger from comment #56) > > > Agreed, I can split the patch. > &

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-10-26 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-10-27 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #25 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #24) > (In reply to Bernd Edlinger from comment #23) > > @@ -5020,7 +5020,7 @@ > > (define_insn_and_split "one_cmpldi2" > &g

[Bug target/77308] surprisingly large stack usage for sha512 on arm

2016-10-28 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77308 --- Comment #27 from wilco at gcc dot gnu.org --- (In reply to Bernd Edlinger from comment #26) > (In reply to wilco from comment #25) > > > > Alternatives can be disabled, there are flags, eg: > > > > (set_a

[Bug target/78733] [7 Regression] bootstrap broken on aarch64-linux-gnu

2016-12-08 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78733 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug target/78733] [7 Regression] bootstrap broken on aarch64-linux-gnu

2016-12-08 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78733 --- Comment #9 from wilco at gcc dot gnu.org --- Patch posted: https://gcc.gnu.org/ml/gcc-patches/2016-12/msg00653.html

[Bug target/78733] [7 Regression] bootstrap broken on aarch64-linux-gnu

2016-12-08 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78733 --- Comment #10 from wilco at gcc dot gnu.org --- Author: wilco Date: Thu Dec 8 19:18:33 2016 New Revision: 243456 URL: https://gcc.gnu.org/viewcvs?rev=243456=gcc=rev Log: This patch fixes an issue in aarch64_classify_address. TImode

[Bug target/78733] [7 Regression] bootstrap broken on aarch64-linux-gnu

2016-12-08 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78733 wilco at gcc dot gnu.org changed: What|Removed |Added Status|NEW |RESOLVED Resolution

[Bug target/78733] [7 Regression] bootstrap broken on aarch64-linux-gnu

2016-12-09 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78733 --- Comment #12 from wilco at gcc dot gnu.org --- Author: wilco Date: Fri Dec 9 14:26:07 2016 New Revision: 243486 URL: https://gcc.gnu.org/viewcvs?rev=243486=gcc=rev Log: Add the test this time... PR target/78733 * gcc.target

[Bug middle-end/78809] Inline strcmp with small constant strings

2016-12-14 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78809 --- Comment #2 from wilco at gcc dot gnu.org --- (In reply to Richard Biener from comment #1) > We may have dups of this. And we now have inlining for strcmp/memcmp when > the > result is only compared against zero. I don't see that

[Bug middle-end/78809] New: Inline strcmp with small constant strings

2016-12-14 Thread wilco at gcc dot gnu.org
: middle-end Assignee: unassigned at gcc dot gnu.org Reporter: wilco at gcc dot gnu.org Target Milestone: --- GCC currently doesn't optimize str(n)cmp of small constant strings (besides the empty string). Such cases can be inlined to avoid the overhead of calling strcmp

[Bug target/78796] TLS fails to link on aarch64 with -mcmodel=large

2016-12-13 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78796 --- Comment #3 from wilco at gcc dot gnu.org --- (In reply to Jakub Jelinek from comment #2) > I can bootstrap/regtest this on aarch64-linux, but 6.3 rc1 is planned for > tomorrow. Could the aarch64 maintainers review it

[Bug target/78796] TLS fails to link on aarch64 with -mcmodel=large

2016-12-13 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78796 --- Comment #6 from wilco at gcc dot gnu.org --- (In reply to James Greenhalgh from comment #4) > This looks sensible, but why not also drop the: > > if (nopcrelative_literal_loads > > As was done in r237607? > > W

[Bug middle-end/77484] [6/7 Regression] Static branch predictor causes ~6-8% regression of SPEC2000 GAP

2016-12-15 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484 --- Comment #12 from wilco at gcc dot gnu.org --- (In reply to wilco from comment #10) > (In reply to Jan Hubicka from comment #9) > > Created attachment 40217 [details] > > predict > > > > Hi, > > here is patch

[Bug target/78255] [5/6/7 regression] Indirect sibling call causing wrong code generation for ARM

2016-12-01 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78255 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug middle-end/77484] [6/7 Regression] Static branch predictor causes ~6-8% regression of SPEC2000 GAP

2016-12-01 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug middle-end/77484] [6/7 Regression] Static branch predictor causes ~6-8% regression of SPEC2000 GAP

2016-12-01 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484 --- Comment #7 from wilco at gcc dot gnu.org --- (In reply to Jan Hubicka from comment #6) > Created attachment 40216 [details] > predict > > Aha, indirect calls should probably be treated separately as their use cases > are

[Bug target/78255] [5/6/7 regression] Indirect sibling call causing wrong code generation for ARM

2016-12-01 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78255 --- Comment #7 from wilco at gcc dot gnu.org --- (In reply to ktkachov from comment #6) > (In reply to wilco from comment #5) > > (In reply to avieira from comment #4) > > > OK so after some extra debugging and digging I found t

[Bug target/78255] [5/6/7 regression] Indirect sibling call causing wrong code generation for ARM

2016-12-02 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78255 --- Comment #10 from wilco at gcc dot gnu.org --- (In reply to Richard Earnshaw from comment #8) > Hmm, why is this even being considered on ARM? > > arm.h:#define NO_FUNCTION_CSE 1 > > doc/tm.texi > @defmac NO_FUNCTION_CSE &

[Bug middle-end/77484] [6/7 Regression] Static branch predictor causes ~6-8% regression of SPEC2000 GAP

2016-12-06 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484 --- Comment #10 from wilco at gcc dot gnu.org --- (In reply to Jan Hubicka from comment #9) > Created attachment 40217 [details] > predict > > Hi, > here is patch adding the polymorphic case, too. > > Honza Looks good

[Bug middle-end/77484] [6/7 Regression] Static branch predictor causes ~6-8% regression of SPEC2000 GAP

2017-01-05 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77484 --- Comment #19 from wilco at gcc dot gnu.org --- > The commit in comment 14 has instroduced size and runtime regressions in the > Spec2006 testsuite on s390x: I get reproducible regressions on AArch64 as well with the latest patch (change

[Bug target/78041] Wrong code on ARMv7 with -mthumb -mfpu=neon-fp16 -O0

2017-01-06 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041 --- Comment #18 from wilco at gcc dot gnu.org --- Author: wilco Date: Fri Jan 6 14:26:06 2017 New Revision: 244161 URL: https://gcc.gnu.org/viewcvs?rev=244161=gcc=rev Log: With -fpu=neon DI mode shifts are expanded after reload. DI mode

[Bug middle-end/80283] [5/6/7 Regression] bad SIMD register allocation

2017-04-10 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80283 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug middle-end/80131] powerpc: 1U << (31 - x) doesn't generate optimised code

2017-04-12 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80131 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug middle-end/80399] Premature optimization with unsigned

2017-04-12 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80399 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug target/78994] -Ofast makes aarch64 C++ benchmark slower for A53

2017-04-12 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78994 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug middle-end/80283] [5/6/7 Regression] bad SIMD register allocation

2017-04-11 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80283 --- Comment #13 from wilco at gcc dot gnu.org --- It looks the x64 issue is unrelated. It starts with a bad schedule which could be improved by the scheduler but that is off by default, while the ARM version starts with a good schedule which

[Bug middle-end/70773] Profiled sudoku solver slower due to lack of sdiv/udiv

2017-04-21 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70773 --- Comment #14 from wilco at gcc dot gnu.org --- (In reply to PeteVine from comment #11) > I've just retested gcc7 on both ARM platforms. > > AArch64 gets a 3% improvement now, while ARMv7 reproduces the issue, just as > before. I

[Bug middle-end/70773] Profiled sudoku solver slower due to lack of sdiv/udiv

2017-04-21 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70773 --- Comment #17 from wilco at gcc dot gnu.org --- (In reply to PeteVine from comment #16) > Also, I'd like to repeat the fact using -mcpu=cortex-a7 fixes the issue (no > library calls present). Cortex-A7 has hardware division so it doesn'

[Bug target/79712] Clang smarter about unrolling in fhourstones benchmark

2017-04-13 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79712 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug middle-end/79665] gcc's signed (x*x)/200 is slower than clang's

2017-04-18 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79665 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug middle-end/70773] Profiled sudoku solver slower due to lack of sdiv/udiv

2017-04-19 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70773 wilco at gcc dot gnu.org changed: What|Removed |Added Status|NEW |WAITING CC

[Bug target/71399] [5/6/7 Regression] 5.3.0 bootstrap comparison failure on arm-linux-gnueabihf

2017-03-13 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71399 --- Comment #19 from wilco at gcc dot gnu.org --- (In reply to Jeffrey A. Law from comment #18) > I've been able to reproduce this under arm-qemu. > > Start by bootstrapping and installing gcc-4.9.4. Then use that gcc-4.9.4 to > bui

[Bug target/71951] libgcc_s built with -fomit-frame-pointer on aarch64 is broken

2017-07-28 Thread wilco at gcc dot gnu.org
||2017-07-28 CC||wilco at gcc dot gnu.org Resolution|DUPLICATE |--- Ever confirmed|0 |1 --- Comment #13 from Wilco --- (In reply to Icenowy Zheng from comment #12) > (In reply to Wi

[Bug target/81643] FAIL: gcc.target/aarch64/long_branch_1.c scan-assembler Ltb

2017-08-15 Thread wilco at gcc dot gnu.org
||wilco at gcc dot gnu.org Resolution|--- |FIXED --- Comment #8 from Wilco --- Fixed

[Bug other/81096] [8 regression] test case ttest in libbacktrace fails starting with its introduction in r249111

2017-08-16 Thread wilco at gcc dot gnu.org
||2017-08-16 CC||wilco at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #4 from Wilco --- Confirmed. It works fine for me with ttest_CFLAGS = -pthread -funwind-tables so the issue is that it doesn't also add

[Bug target/81357] Extra mov for zero extend of add

2017-08-10 Thread wilco at gcc dot gnu.org
||2017-08-10 CC||wilco at gcc dot gnu.org Ever confirmed|0 |1

[Bug middle-end/46932] Inefficient code sequence to access local variable

2017-08-14 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46932 --- Comment #9 from Wilco --- Author: wilco Date: Mon Aug 14 11:18:50 2017 New Revision: 251087 URL: https://gcc.gnu.org/viewcvs?rev=251087=gcc=rev Log: Add check_effective_target_autoincdec. Add check_effective_target_autoincdec that returns

[Bug target/81643] FAIL: gcc.target/aarch64/long_branch_1.c scan-assembler Ltb

2017-08-14 Thread wilco at gcc dot gnu.org
||wilco at gcc dot gnu.org Resolution|--- |FIXED --- Comment #9 from Wilco --- Fixed in r251094.

[Bug target/81643] FAIL: gcc.target/aarch64/long_branch_1.c scan-assembler Ltb

2017-08-14 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81643 --- Comment #8 from Wilco --- Author: wilco Date: Mon Aug 14 16:18:37 2017 New Revision: 251094 URL: https://gcc.gnu.org/viewcvs?rev=251094=gcc=rev Log: [AArch64] Fix longbranch test Fix longbranch test so it still generates long tbz branches.

[Bug target/70119] AArch64 should take advantage of implicit truncation of variable shift amount without defining SHIFT_COUNT_TRUNCATED

2017-07-07 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70119 Wilco changed: What|Removed |Added Target Milestone|--- |8.0

[Bug target/70119] AArch64 should take advantage of implicit truncation of variable shift amount without defining SHIFT_COUNT_TRUNCATED

2017-07-07 Thread wilco at gcc dot gnu.org
||wilco at gcc dot gnu.org Resolution|--- |FIXED --- Comment #7 from Wilco --- Confirmed fixed on trunk.

[Bug middle-end/70140] Inefficient expansion of __builtin_mempcpy

2017-07-14 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70140 Wilco changed: What|Removed |Added CC||wilco at gcc dot gnu.org --- Comment #3 from

[Bug middle-end/70140] Inefficient expansion of __builtin_mempcpy

2017-07-17 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70140 --- Comment #7 from Wilco --- (In reply to Martin Liška from comment #6) > Created attachment 41772 [details] > Patch candidate > > I'm going to prepare some test-cases for that. Does it look good? Yes, it now inlines small constant sizes.

[Bug middle-end/70801] IRA caller-saves does not support rematerialization

2017-07-07 Thread wilco at gcc dot gnu.org
||2017-07-07 CC||wilco at gcc dot gnu.org Assignee|unassigned at gcc dot gnu.org |wilco at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Wilco --- This is fixed by improving

[Bug tree-optimization/81303] [8 Regression] 410.bwaves regression caused by r249919

2017-07-12 Thread wilco at gcc dot gnu.org
||2017-07-12 CC||wilco at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #3 from Wilco --- Confirmed, on AArch64 bwaves is ~20% slower in SPEC2006 and ~30% slower in SPEC2017. There are twice as many spills (outside

[Bug middle-end/81445] Dynamic stack allocation not optimized into static allocation

2017-07-14 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81445 --- Comment #5 from Wilco --- (In reply to Marc Glisse from comment #4) > (In reply to Wilco from comment #2) > > I don't see it happen for the simplest case in current trunk: > > 400 bytes is too large, try again with something smaller. (I'm

[Bug middle-end/81445] Dynamic stack allocation not optimized into static allocation

2017-07-14 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81445 --- Comment #3 from Wilco --- There is also something buggy with the way alloca aligns, it always allocates 16 bytes too much...

[Bug middle-end/81445] Dynamic stack allocation not optimized into static allocation

2017-07-14 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81445 --- Comment #2 from Wilco --- (In reply to Marc Glisse from comment #1) > Note that we already do it for VLA (aka BUILT_IN_ALLOCA_WITH_ALIGN) in CCP. I don't see it happen for the simplest case in current trunk: void t(int *); void vla(void) {

[Bug middle-end/81445] New: Dynamic stack allocation not optimized into static allocation

2017-07-14 Thread wilco at gcc dot gnu.org
Priority: P3 Component: middle-end Assignee: unassigned at gcc dot gnu.org Reporter: wilco at gcc dot gnu.org Target Milestone: --- Many compilers optimize small dynamic allocations into static allocation. This is more efficient as it allows multiple small dynamic

[Bug target/46932] Inefficient code sequence to access local variable

2017-07-18 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46932 Wilco changed: What|Removed |Added CC||wilco at gcc dot gnu.org --- Comment #3 from

[Bug middle-end/70140] Inefficient expansion of __builtin_mempcpy

2017-07-18 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70140 --- Comment #9 from Wilco --- (In reply to Martin Liška from comment #8) > (In reply to Wilco from comment #7) > > (In reply to Martin Liška from comment #6) > > > Created attachment 41772 [details] > > > Patch candidate > > > > > > I'm going

[Bug rtl-optimization/81434] AArch64 instruction fusing and pipeline scheduling problem

2017-07-20 Thread wilco at gcc dot gnu.org
||2017-07-20 Ever confirmed|0 |1 --- Comment #6 from Wilco --- (In reply to jim.wilson from comment #5) > On Wed, Jul 19, 2017 at 4:25 AM, wilco at gcc dot gnu.org > <gcc-bugzi...@gcc.gnu.org> wrote: > > To more accurately schedule fusion pair

[Bug rtl-optimization/81434] AArch64 instruction fusing and pipeline scheduling problem

2017-07-20 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81434 --- Comment #8 from Wilco --- (In reply to jim.wilson from comment #7) > On Thu, Jul 20, 2017 at 4:20 AM, wilco at gcc dot gnu.org > <gcc-bugzi...@gcc.gnu.org> wrote: > > Do you think it might be feasible to update resource u

[Bug middle-end/46932] Inefficient code sequence to access local variable

2017-07-20 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46932 --- Comment #4 from Wilco --- Patch: https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01245.html

[Bug target/79041] aarch64 backend emits R_AARCH64_ADR_PREL_PG_HI21 relocation despite -mpc-relative-literal-loads option being used

2017-07-25 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79041 --- Comment #8 from Wilco --- Author: wilco Date: Tue Jul 25 12:08:59 2017 New Revision: 250514 URL: https://gcc.gnu.org/viewcvs?rev=250514=gcc=rev Log: Fix PR79041 As described in PR79041, -mcmodel=large -mpc-relative-literal-loads may be

[Bug target/79041] aarch64 backend emits R_AARCH64_ADR_PREL_PG_HI21 relocation despite -mpc-relative-literal-loads option being used

2017-07-25 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79041 Wilco changed: What|Removed |Added CC||wilco at gcc dot gnu.org --- Comment #9 from

[Bug target/79041] aarch64 backend emits R_AARCH64_ADR_PREL_PG_HI21 relocation despite -mpc-relative-literal-loads option being used

2017-07-24 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79041 --- Comment #7 from Wilco --- Author: wilco Date: Mon Jul 24 18:06:37 2017 New Revision: 250478 URL: https://gcc.gnu.org/viewcvs?rev=250478=gcc=rev Log: Fix PR79041 As described in PR79041, -mcmodel=large -mpc-relative-literal-loads may be

[Bug middle-end/46932] Inefficient code sequence to access local variable

2017-07-26 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46932 Wilco changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/79041] aarch64 backend emits R_AARCH64_ADR_PREL_PG_HI21 relocation despite -mpc-relative-literal-loads option being used

2017-07-26 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79041 --- Comment #10 from Wilco --- Author: wilco Date: Wed Jul 26 11:55:03 2017 New Revision: 250567 URL: https://gcc.gnu.org/viewcvs?rev=250567=gcc=rev Log: Disable pr79041-2.c with -mabi=ilp32. gcc/testsuite/ PR target/79041

[Bug middle-end/46932] Inefficient code sequence to access local variable

2017-07-26 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46932 --- Comment #5 from Wilco --- Author: wilco Date: Wed Jul 26 10:49:17 2017 New Revision: 250564 URL: https://gcc.gnu.org/viewcvs?rev=250564=gcc=rev Log: Fix PR46932: Block auto increment on frame pointer Block auto increment on frame pointer

[Bug target/79041] aarch64 backend emits R_AARCH64_ADR_PREL_PG_HI21 relocation despite -mpc-relative-literal-loads option being used

2017-07-26 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79041 --- Comment #11 from Wilco --- Author: wilco Date: Wed Jul 26 11:57:57 2017 New Revision: 250569 URL: https://gcc.gnu.org/viewcvs?rev=250569=gcc=rev Log: Disable pr79041-2.c with -mabi=ilp32. gcc/testsuite/ PR target/79041

[Bug rtl-optimization/81434] AArch64 instruction fusing and pipeline scheduling problem

2017-07-19 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81434 Wilco changed: What|Removed |Added CC||wilco at gcc dot gnu.org --- Comment #4 from

[Bug tree-optimization/81303] [8 Regression] 410.bwaves regression caused by r249919

2017-07-24 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81303 --- Comment #8 from Wilco --- (In reply to Richard Biener from comment #7) Unfortunately these commits have had no effect on AArch64...

[Bug middle-end/70140] Inefficient expansion of __builtin_mempcpy

2017-07-21 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70140 --- Comment #11 from Wilco --- (In reply to Martin Liška from comment #10) > > > > > > Yep, I've noticed. It's strange for me why it's not working. I've just > > > asked > > > at GCC ML: https://gcc.gnu.org/ml/gcc/2017-07/msg00144.html > > >

[Bug target/80266] ICE in store_pairsi condition with -mabi=ilp32

2017-07-05 Thread wilco at gcc dot gnu.org
||2017-07-05 CC||wilco at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Wilco --- Confirmed. This is the same issue as: https://gcc.gnu.org/ml/gcc-patches/2017-06/msg02422.html Ada somehow generates SImode

[Bug target/80266] ICE in store_pairsi condition with -mabi=ilp32

2017-07-05 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80266 --- Comment #2 from Wilco --- Fixing aarch64_classify_address means we now reject incorrect addresses, however GCC midend generates a lot of 32-bit pointers which are not correctly changed into addresses, resulting in even more assertions. So

[Bug middle-end/79665] gcc's signed (x*x)/200 is slower than clang's

2017-06-28 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79665 --- Comment #19 from Wilco --- Author: wilco Date: Wed Jun 28 14:13:02 2017 New Revision: 249740 URL: https://gcc.gnu.org/viewcvs?rev=249740=gcc=rev Log: Improve Cortex-A53 shift bypass The aarch_forward_to_shift_is_not_shifted_reg bypass

[Bug target/80530] [7/8 Regression][AArch64] ICE when expanding reciprocal square root with -mcpu=exynos-m1 or -mcpu=xgene-1

2017-04-26 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80530 wilco at gcc dot gnu.org changed: What|Removed |Added CC||wilco at gcc dot gnu.org

[Bug middle-end/79665] gcc's signed (x*x)/200 is slower than clang's

2017-04-27 Thread wilco at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79665 --- Comment #16 from wilco at gcc dot gnu.org --- (In reply to wilco from comment #14) > (In reply to PeteVine from comment #13) > > Still, the 5% regression must have happened very recently. The fast gcc was > > built on 201702

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