[Bug target/118146] [14/15 Regression] ICE: in riscv_legitimize_move, at config/riscv/riscv.cc:3641 when reinterpreting short vector as _Float16

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118146

--- Comment #5 from GCC Commits  ---
The master branch has been updated by Jeff Law :

https://gcc.gnu.org/g:9576353454e6c2a20a9742e2f29f17830766cd8a

commit r15-7448-g9576353454e6c2a20a9742e2f29f17830766cd8a
Author: Jeff Law 
Date:   Sat Feb 8 22:07:16 2025 -0700

[RISC-V][PR target/118146] Fix ICE for unsupported modes

There's some special case code in the risc-v move expander to try and
optimize
cases where the source is a subreg of a vector and the destination is a
scalar
mode.

The code works fine except when we have no support for the given mode. ie
HF or
BF when those extensions aren't enabled.  We'll end up tripping an assert
in
that case when we should have just let standard expansion do its thing.

Tested in my system for rv32 and rv64, but I'll wait for the pre-commit
tester
to render a verdict before moving forward.

PR target/118146
gcc/
* config/riscv/riscv.cc (riscv_legitimize_move): Handle subreg
of vector source better to avoid ICE.

gcc/testsuite
* gcc.target/riscv/pr118146-1.c: New test.
* gcc.target/riscv/pr118146-2.c: New test.

[Bug target/118146] [14/15 Regression] ICE: in riscv_legitimize_move, at config/riscv/riscv.cc:3641 when reinterpreting short vector as _Float16

[law at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118146

--- Comment #4 from Jeffrey A. Law  ---
Thanks Sam.  Same problem, same fix.

[Bug target/118146] [14/15 Regression] ICE: in riscv_legitimize_move, at config/riscv/riscv.cc:3641 when reinterpreting short vector as _Float16

[sjames at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118146

Sam James  changed:

   What|Removed |Added

 CC||sjames at gcc dot gnu.org

--- Comment #3 from Sam James  ---
Created attachment 60428
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=60428&action=edit
od.i

`riscv64-unknown-linux-gnu-gcc -std=gnu23  -I. -I./lib  -Ilib -I./lib -Isrc
-I./src-march=rv64gcv -mabi=lp64d -O2 -pipe -c -o src/od.o src/od.c`

[Bug target/118146] [14/15 Regression] ICE: in riscv_legitimize_move, at config/riscv/riscv.cc:3641 when reinterpreting short vector as _Float16

[sjames at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118146

--- Comment #2 from Sam James  ---
This seems to show up when building coreutils-9.6.

[Bug target/118146] [14/15 Regression] ICE: in riscv_legitimize_move, at config/riscv/riscv.cc:3641 when reinterpreting short vector as _Float16

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118146

Richard Biener  changed:

   What|Removed |Added

   Priority|P3  |P4

[Bug target/118146] [14/15 Regression] ICE: in riscv_legitimize_move, at config/riscv/riscv.cc:3641 when reinterpreting short vector as _Float16

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118146

Richard Biener  changed:

   What|Removed |Added

   Target Milestone|--- |14.3

[Bug target/118146] [14/15 Regression] ICE: in riscv_legitimize_move, at config/riscv/riscv.cc:3641 when reinterpreting short vector as _Float16

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118146

Andrew Pinski  changed:

   What|Removed |Added

 Status|UNCONFIRMED |NEW
 Ever confirmed|0   |1
   Last reconfirmed||2024-12-21

--- Comment #1 from Andrew Pinski  ---
Reduced without an aliasing issues:
```
typedef __attribute__((__vector_size__(sizeof(_Float16 short V;
typedef __attribute__((__vector_size__(sizeof(_Float16 _Float16 V1;
float f;

void
foo(V v)
{
  f = ((V1)v)[0];
}
```