[Bug target/122692] [15/16 regression] U16 array to U8 array saturation test fails on riscv64-linux-gnu

2025-11-20 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122692

--- Comment #6 from GCC Commits  ---
The master branch has been updated by Jeff Law :

https://gcc.gnu.org/g:8615c855fa5647db11c84b882f0d88aadfc28863

commit r16-5455-g8615c855fa5647db11c84b882f0d88aadfc28863
Author: Pan Li 
Date:   Thu Nov 20 08:16:10 2025 -0700

[PATCH v1] RISC-V: Fix missed zero extend for unsigned scalar SAT_TRUNC
[PR122692]

When the input of the scalar unsigned SAT_TRUNC is not Xmode,
the rtx need to zero extend to Xmode before the underlying
code gen.  Most of other SAT_* code gen has leveraged
the API riscv_extend_to_xmode_reg but still have the ustrunc
missed.  Then results in the failures mentioned in PR.

The below test suites are passed for this patch series.
* The rv64gcv fully regression test.

PR target/122692

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_expand_ustrunc): Leverage
riscv_extend_to_xmode_reg to take care of src rtx.

gcc/testsuite/ChangeLog:

* g++.target/riscv/pr122692-run-1.C: New test.
* g++.target/riscv/pr122692-run-2.C: New test.

Signed-off-by: Pan Li

[Bug target/122692] [15/16 regression] U16 array to U8 array saturation test fails on riscv64-linux-gnu

2025-11-17 Thread pan2.li at intel dot com via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122692

--- Comment #5 from Li Pan  ---
Ack, will try to reproduce it soon.

[Bug target/122692] [15/16 regression] U16 array to U8 array saturation test fails on riscv64-linux-gnu

2025-11-17 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122692

Jeffrey A. Law  changed:

   What|Removed |Added

 Blocks|120763  |
   Last reconfirmed||2025-11-17
 Status|UNCONFIRMED |ASSIGNED
   Assignee|unassigned at gcc dot gnu.org  |pan2.li at intel dot com
 Ever confirmed|0   |1
 CC||pan2.li at intel dot com

--- Comment #4 from Jeffrey A. Law  ---
Seems to be triggered by:

commit 5d2115b850df63b0ecdf56efb720ad848e7afe21 (HEAD)
Author: Pan Li 
Date:   Mon Jul 1 16:36:35 2024 +0800

RISC-V: Implement the .SAT_TRUNC for scalar

This patch would like to implement the simple .SAT_TRUNC pattern
in the riscv backend. Aka:

Form 1:
  #define DEF_SAT_U_TRUC_FMT_1(NT, WT) \
  NT __attribute__((noinline)) \
  sat_u_truc_##WT##_to_##NT##_fmt_1 (WT x) \
  {\
bool overflow = x > (WT)(NT)(-1);  \
return ((NT)x) | (NT)-overflow;\
  }

DEF_SAT_U_TRUC_FMT_1(uint32_t, uint64_t)
 [ ... ]

But I haven't dug deeper than that.


Referenced Bugs:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
[Bug 120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

[Bug target/122692] [15/16 regression] U16 array to U8 array saturation test fails on riscv64-linux-gnu

2025-11-15 Thread sjames at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122692

Sam James  changed:

   What|Removed |Added

   Target Milestone|--- |15.3
Summary|U16 array to U8 array   |[15/16 regression] U16
   |saturation test fails on|array to U8 array
   |riscv64-linux-gnu   |saturation test fails on
   ||riscv64-linux-gnu