[Bug target/71607] [5/6/7/8 Regression] [ARM] ice due to forbidden enabled attribute dependency on instruction operands

2017-10-10 Thread jakub at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71607

Jakub Jelinek  changed:

   What|Removed |Added

   Target Milestone|5.5 |6.5

--- Comment #17 from Jakub Jelinek  ---
GCC 5 branch is being closed

[Bug target/71607] [5/6/7/8 Regression] [ARM] ice due to forbidden enabled attribute dependency on instruction operands

2017-06-19 Thread thopre01 at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71607

--- Comment #16 from Thomas Preud'homme  ---
Author: thopre01
Date: Mon Jun 19 15:01:11 2017
New Revision: 249372

URL: https://gcc.gnu.org/viewcvs?rev=249372=gcc=rev
Log:
PR71607: Fix ICE when loading constant

2017-06-19  Prakhar Bahuguna  

Backport from mainline
2017-05-05  Andre Vieira  
Prakhar Bahuguna  

gcc/
PR target/71607
* config/arm/arm.md (use_literal_pool): Remove.
(64-bit immediate split): No longer takes cost into consideration
if arm_disable_literal_pool is enabled.
* config/arm/arm.c (arm_tls_referenced_p): Add diagnostic if TLS is
used when arm_disable_literal_pool is enabled.
(arm_max_const_double_inline_cost): Remove use of
arm_disable_literal_pool.
(push_minipool_fix): Add assert.
(arm_reorg): Add return if arm_disable_literal_pool is enabled.
* config/arm/vfp.md (no_literal_pool_df_immediate): New.
(no_literal_pool_sf_immediate): New.

gcc/testsuite/
PR target/71607
* gcc.target/arm/thumb2-slow-flash-data.c: Renamed to ...
* gcc.target/arm/thumb2-slow-flash-data-1.c: ... this.
* gcc.target/arm/thumb2-slow-flash-data-2.c: New.
* gcc.target/arm/thumb2-slow-flash-data-3.c: New.
* gcc.target/arm/thumb2-slow-flash-data-4.c: New.
* gcc.target/arm/thumb2-slow-flash-data-5.c: New.
* gcc.target/arm/tls-disable-literal-pool.c: New.


Added:
   
branches/ARM/embedded-6-branch/gcc/testsuite/gcc.target/arm/tls-disable-literal-pool.c
Modified:
branches/ARM/embedded-6-branch/gcc/ChangeLog.arm
branches/ARM/embedded-6-branch/gcc/config/arm/arm.c
branches/ARM/embedded-6-branch/gcc/config/arm/vfp.md
branches/ARM/embedded-6-branch/gcc/testsuite/ChangeLog.arm
   
branches/ARM/embedded-6-branch/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-2.c
   
branches/ARM/embedded-6-branch/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-3.c
   
branches/ARM/embedded-6-branch/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-4.c
   
branches/ARM/embedded-6-branch/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-5.c

[Bug target/71607] [5/6/7/8 Regression] [ARM] ice due to forbidden enabled attribute dependency on instruction operands

2017-06-02 Thread prakhar at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71607

--- Comment #15 from prakhar at gcc dot gnu.org ---
Author: prakhar
Date: Fri Jun  2 11:19:16 2017
New Revision: 248822

URL: https://gcc.gnu.org/viewcvs?rev=248822=gcc=rev
Log:
PR71607: Fix ICE when loading constant

2017-06-02  Prakhar Bahuguna  

Backport from mainline
2017-05-05  Andre Vieira  
Prakhar Bahuguna  

gcc/
PR target/71607
* config/arm/arm.md (use_literal_pool): Remove.
(64-bit immediate split): No longer takes cost into consideration
if arm_disable_literal_pool is enabled.
* config/arm/arm.c (arm_tls_referenced_p): Add diagnostic if TLS is
used when arm_disable_literal_pool is enabled.
(arm_max_const_double_inline_cost): Remove use of
arm_disable_literal_pool.
(push_minipool_fix): Add assert.
(arm_reorg): Add return if arm_disable_literal_pool is enabled.
* config/arm/vfp.md (no_literal_pool_df_immediate): New.
(no_literal_pool_sf_immediate): New.

2017-05-05  Andre Vieira  
Thomas Preud'homme  
Prakhar Bahuguna  

gcc/testsuite/
PR target/71607
* gcc.target/arm/thumb2-slow-flash-data.c: Renamed to ...
* gcc.target/arm/thumb2-slow-flash-data-1.c: ... this.
* gcc.target/arm/thumb2-slow-flash-data-2.c: New.
* gcc.target/arm/thumb2-slow-flash-data-3.c: New.
* gcc.target/arm/thumb2-slow-flash-data-4.c: New.
* gcc.target/arm/thumb2-slow-flash-data-5.c: New.
* gcc.target/arm/tls-disable-literal-pool.c: New.

Added:
   
branches/gcc-7-branch/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-2.c
   
branches/gcc-7-branch/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-3.c
   
branches/gcc-7-branch/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-4.c
   
branches/gcc-7-branch/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-5.c
   
branches/gcc-7-branch/gcc/testsuite/gcc.target/arm/tls-disable-literal-pool.c
Modified:
branches/gcc-7-branch/gcc/ChangeLog
branches/gcc-7-branch/gcc/config/arm/arm.c
branches/gcc-7-branch/gcc/config/arm/arm.md
branches/gcc-7-branch/gcc/config/arm/vfp.md
branches/gcc-7-branch/gcc/testsuite/ChangeLog

[Bug target/71607] [5/6/7/8 Regression] [ARM] ice due to forbidden enabled attribute dependency on instruction operands

2017-05-05 Thread thopre01 at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71607

--- Comment #14 from Thomas Preud'homme  ---
Author: thopre01
Date: Fri May  5 15:41:28 2017
New Revision: 247640

URL: https://gcc.gnu.org/viewcvs?rev=247640=gcc=rev
Log:
[ARM] PR71607: Fix ICE when loading constant

2017-05-05  Andre Vieira  
Prakhar Bahuguna  

gcc/
PR target/71607
* config/arm/arm.md (use_literal_pool): Remove.
(64-bit immediate split): No longer takes cost into consideration
if arm_disable_literal_pool is enabled.
* config/arm/arm.c (arm_tls_referenced_p): Add diagnostic if TLS is
used when arm_disable_literal_pool is enabled.
(arm_max_const_double_inline_cost): Remove use of
arm_disable_literal_pool.
(push_minipool_fix): Add assert.
(arm_reorg): Add return if arm_disable_literal_pool is enabled.
* config/arm/vfp.md (no_literal_pool_df_immediate): New.
(no_literal_pool_sf_immediate): New.

2017-05-05  Andre Vieira  
Thomas Preud'homme  
Prakhar Bahuguna  

gcc/testsuite/
PR target/71607
* gcc.target/arm/thumb2-slow-flash-data.c: Renamed to ...
* gcc.target/arm/thumb2-slow-flash-data-1.c: ... this.
* gcc.target/arm/thumb2-slow-flash-data-2.c: New.
* gcc.target/arm/thumb2-slow-flash-data-3.c: New.
* gcc.target/arm/thumb2-slow-flash-data-4.c: New.
* gcc.target/arm/thumb2-slow-flash-data-5.c: New.
* gcc.target/arm/tls-disable-literal-pool.c: New.

Added:
trunk/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-1.c
  - copied, changed from r247638,
trunk/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data.c
trunk/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-2.c
trunk/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-3.c
trunk/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-4.c
trunk/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-5.c
trunk/gcc/testsuite/gcc.target/arm/tls-disable-literal-pool.c
Removed:
trunk/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data.c
Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/arm/arm.c
trunk/gcc/config/arm/arm.md
trunk/gcc/config/arm/vfp.md
trunk/gcc/testsuite/ChangeLog

[Bug target/71607] [5/6/7/8 Regression] [ARM] ice due to forbidden enabled attribute dependency on instruction operands

2017-05-03 Thread christophe.monat at st dot com 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71607

--- Comment #13 from Christophe Monat  ---
(In reply to Prakhar Bahuguna from comment #12)

Hi Prakar,

> The patch has now been posted to the mailing list:
> https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00872.html

Thanks for the work, and the kind notification.

I really have high hopes that it will be accepted soon (Ramana, could you
please...?), since I am getting high internal pressure to have it fixed, to
move forward to deliver our own work.
--C