https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92686
Hongtao.liu changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92686
--- Comment #5 from liuhongt at gcc dot gnu.org ---
Author: liuhongt
Date: Mon Dec 9 04:16:24 2019
New Revision: 279107
URL: https://gcc.gnu.org/viewcvs?rev=279107=gcc=rev
Log:
Enable mask movement for VCOND_EXPR under avx512f for
128/256-bit
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92686
--- Comment #4 from Hongtao.liu ---
(In reply to Richard Biener from comment #2)
> It would be definitely nice to have this. Maybe add a tunable whether to use
> mask registers for SSE/AVX2?
Sure for 128/256-bit vector under avx512f.
> Is
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92686
--- Comment #3 from Hongtao.liu ---
Created attachment 47372
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=47372=edit
Local patch with Bootstrap and regression test on i386/x86_64 is ok.
Also I found there are some disturb with pr88547.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92686
Richard Biener changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92686
--- Comment #1 from Hongtao.liu ---
My local patch shows there's no big performance impact on SPEC2017.
