[gcc r15-1071] AArch64: correct constraint on Upl early clobber alternatives

https://gcc.gnu.org/g:afe85f8e22a703280b17c701f3490d89337f674a commit r15-1071-gafe85f8e22a703280b17c701f3490d89337f674a Author: Tamar Christina Date: Thu Jun 6 14:35:48 2024 +0100 AArch64: correct constraint on Upl early clobber alternatives I made an oversight in the previous

[gcc r15-1041] AArch64: enable new predicate tuning for Neoverse cores.

https://gcc.gnu.org/g:3eb9f6eab9802d5ae65ead6b1f2ae6fe0833e06e commit r15-1041-g3eb9f6eab9802d5ae65ead6b1f2ae6fe0833e06e Author: Tamar Christina Date: Wed Jun 5 19:32:16 2024 +0100 AArch64: enable new predicate tuning for Neoverse cores. This enables the new tuning flag for

[gcc r15-1040] AArch64: add new alternative with early clobber to patterns

https://gcc.gnu.org/g:2de3bbde1ebea8689f3596967769f66bf903458e commit r15-1040-g2de3bbde1ebea8689f3596967769f66bf903458e Author: Tamar Christina Date: Wed Jun 5 19:31:39 2024 +0100 AArch64: add new alternative with early clobber to patterns This patch adds new alternatives to the

[gcc r15-1039] AArch64: add new tuning param and attribute for enabling conditional early clobber

https://gcc.gnu.org/g:35f17c680ca650f8658994f857358e5a529c0b93 commit r15-1039-g35f17c680ca650f8658994f857358e5a529c0b93 Author: Tamar Christina Date: Wed Jun 5 19:31:11 2024 +0100 AArch64: add new tuning param and attribute for enabling conditional early clobber This adds a new

[gcc r15-1038] AArch64: convert several predicate patterns to new compact syntax

https://gcc.gnu.org/g:fd4898891ae0c73d6b7aa433cd1ef4539aaa2457 commit r15-1038-gfd4898891ae0c73d6b7aa433cd1ef4539aaa2457 Author: Tamar Christina Date: Wed Jun 5 19:30:39 2024 +0100 AArch64: convert several predicate patterns to new compact syntax This converts the single

[gcc r14-10040] middle-end: refactory vect_recog_absolute_difference to simplify flow [PR114769]

https://gcc.gnu.org/g:1216460e7023cd8ec49933866107417c70e933c9 commit r14-10040-g1216460e7023cd8ec49933866107417c70e933c9 Author: Tamar Christina Date: Fri Apr 19 15:22:13 2024 +0100 middle-end: refactory vect_recog_absolute_difference to simplify flow [PR114769] Hi All,

[gcc r14-10014] AArch64: remove reliance on register allocator for simd/gpreg costing. [PR114741]

https://gcc.gnu.org/g:a2f4be3dae04fa8606d1cc8451f0b9d450f7e6e6 commit r14-10014-ga2f4be3dae04fa8606d1cc8451f0b9d450f7e6e6 Author: Tamar Christina Date: Thu Apr 18 11:47:42 2024 +0100 AArch64: remove reliance on register allocator for simd/gpreg costing. [PR114741] In PR114741 we

gcc-wwwdocs branch master updated. 3530b8d820658fb3add4b06def91672a0053f2b2

This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "gcc-wwwdocs". The branch, master has been updated via 3530b8d820658fb3add4b06def91672a0053f2b2 (commit) from

[gcc r14-9997] testsuite: Fix data check loop on vect-early-break_124-pr114403.c

https://gcc.gnu.org/g:f438acf7ce2e6cb862cf62f2543c36639e2af233 commit r14-9997-gf438acf7ce2e6cb862cf62f2543c36639e2af233 Author: Tamar Christina Date: Tue Apr 16 20:56:26 2024 +0100 testsuite: Fix data check loop on vect-early-break_124-pr114403.c The testcase had the wrong

[gcc r11-11323] [AArch64]: Do not allow SIMD clones with simdlen 1 [PR113552]

https://gcc.gnu.org/g:0c2fcf3ddfe93d1f403962c4bacbb5d55ab7d19d commit r11-11323-g0c2fcf3ddfe93d1f403962c4bacbb5d55ab7d19d Author: Tamar Christina Date: Mon Apr 15 12:32:24 2024 +0100 [AArch64]: Do not allow SIMD clones with simdlen 1 [PR113552] This is a backport of

[gcc r12-10329] AArch64: Do not allow SIMD clones with simdlen 1 [PR113552]

https://gcc.gnu.org/g:642cfd049780f03335da9fe0a51415f130232334 commit r12-10329-g642cfd049780f03335da9fe0a51415f130232334 Author: Tamar Christina Date: Mon Apr 15 12:16:53 2024 +0100 AArch64: Do not allow SIMD clones with simdlen 1 [PR113552] This is a backport of

[gcc r13-8604] AArch64: Do not allow SIMD clones with simdlen 1 [PR113552]

https://gcc.gnu.org/g:1e08e39c743692afdd5d3546b2223474beac1dbc commit r13-8604-g1e08e39c743692afdd5d3546b2223474beac1dbc Author: Tamar Christina Date: Mon Apr 15 12:11:48 2024 +0100 AArch64: Do not allow SIMD clones with simdlen 1 [PR113552] This is a backport of

[gcc r14-9969] middle-end: adjust loop upper bounds when peeling for gaps and early break [PR114403].

https://gcc.gnu.org/g:85002f8085c25bb3e74ab013581a74e7c7ae006b commit r14-9969-g85002f8085c25bb3e74ab013581a74e7c7ae006b Author: Tamar Christina Date: Mon Apr 15 12:06:21 2024 +0100 middle-end: adjust loop upper bounds when peeling for gaps and early break [PR114403]. This fixes

[gcc r14-9493] match.pd: Only merge truncation with conversion for -fno-signed-zeros

https://gcc.gnu.org/g:7dd3b2b09cbeb6712ec680a0445cb0ad41070423 commit r14-9493-g7dd3b2b09cbeb6712ec680a0445cb0ad41070423 Author: Joe Ramsay Date: Fri Mar 15 09:20:45 2024 + match.pd: Only merge truncation with conversion for -fno-signed-zeros This optimisation does not honour