[gcc r15-347] Add myself to DCO

https://gcc.gnu.org/g:80d1e2ec4d394111ebd50d2e8928f7596b7b5c7e commit r15-347-g80d1e2ec4d394111ebd50d2e8928f7596b7b5c7e Author: H.J. Lu Date: Thu May 9 07:59:50 2024 -0700 Add myself to DCO ChangeLog: * MAINTAINERS: Add myself to DCO. Signed-off-by: H.J.

[gcc r14-10672] x86-64: Don't use temp for argument in a TImode register

https://gcc.gnu.org/g:3f3f546bf830d019224aaf6cd349a1b9b738de1a commit r14-10672-g3f3f546bf830d019224aaf6cd349a1b9b738de1a Author: H.J. Lu Date: Fri Sep 6 05:24:07 2024 -0700 x86-64: Don't use temp for argument in a TImode register Don't use temp for a PARALLEL BLKmode argument of

[gcc r13-9028] x86-64: Don't use temp for argument in a TImode register

https://gcc.gnu.org/g:64af1a600f6bd57d47a5926f2328682bba88be90 commit r13-9028-g64af1a600f6bd57d47a5926f2328682bba88be90 Author: H.J. Lu Date: Fri Sep 6 05:24:07 2024 -0700 x86-64: Don't use temp for argument in a TImode register Don't use temp for a PARALLEL BLKmode argument of a

[gcc r12-10710] x86-64: Don't use temp for argument in a TImode register

https://gcc.gnu.org/g:ebdc85b6ce4f2067431331a1a37440e952efd49b commit r12-10710-gebdc85b6ce4f2067431331a1a37440e952efd49b Author: H.J. Lu Date: Fri Sep 6 05:24:07 2024 -0700 x86-64: Don't use temp for argument in a TImode register Don't use temp for a PARALLEL BLKmode argument of

[gcc r15-3088] Update LDPT_REGISTER_CLAIM_FILE_HOOK_V2 linker plugin hook

https://gcc.gnu.org/g:a98dd536b1017c2b814a3465206c6c01b2890998 commit r15-3088-ga98dd536b1017c2b814a3465206c6c01b2890998 Author: H.J. Lu Date: Wed Aug 21 07:25:25 2024 -0700 Update LDPT_REGISTER_CLAIM_FILE_HOOK_V2 linker plugin hook This hook allows the BFD linker plugin to distin

[gcc r15-3135] lto: Don't check obj.found for offload section

https://gcc.gnu.org/g:cb51e0b236c7d492af2033582230e78d8b55290f commit r15-3135-gcb51e0b236c7d492af2033582230e78d8b55290f Author: H.J. Lu Date: Fri Aug 23 05:36:45 2024 -0700 lto: Don't check obj.found for offload section obj.found is the number of LTO symbols. We should include t

[gcc r15-3222] Extend check-function-bodies to allow label and directives

https://gcc.gnu.org/g:d6bb1e257fc414d21bc31faa7ddecbc93a197e3c commit r15-3222-gd6bb1e257fc414d21bc31faa7ddecbc93a197e3c Author: H.J. Lu Date: Tue Aug 27 07:03:22 2024 -0700 Extend check-function-bodies to allow label and directives As PR target/116174 shown, we may need to verify

[gcc r15-3223] pr116174.c: Add the missing */

https://gcc.gnu.org/g:ee986126807e68b996d02f5d792268df799b32fb commit r15-3223-gee986126807e68b996d02f5d792268df799b32fb Author: H.J. Lu Date: Tue Aug 27 07:21:02 2024 -0700 pr116174.c: Add the missing */ * gcc.target/i386/pr116174.c: Add the missing */. Signed-of

[gcc r15-3416] ipa: Don't disable function parameter analysis for fat LTO

https://gcc.gnu.org/g:2f1689ea8e631ebb4ff3720d56ef0362f5898ff6 commit r15-3416-g2f1689ea8e631ebb4ff3720d56ef0362f5898ff6 Author: H.J. Lu Date: Tue Aug 27 13:11:39 2024 -0700 ipa: Don't disable function parameter analysis for fat LTO Update analyze_parms not to disable function par

[gcc r14-10629] Update LDPT_REGISTER_CLAIM_FILE_HOOK_V2 linker plugin hook

https://gcc.gnu.org/g:66eb7b752ab61c02348d6af10945af3ff92b6d77 commit r14-10629-g66eb7b752ab61c02348d6af10945af3ff92b6d77 Author: H.J. Lu Date: Wed Aug 21 07:25:25 2024 -0700 Update LDPT_REGISTER_CLAIM_FILE_HOOK_V2 linker plugin hook This hook allows the BFD linker plugin to disti

[gcc r14-10630] lto: Don't check obj.found for offload section

https://gcc.gnu.org/g:0562522e1290da08bc5a89182b9ae80c3cc9d1db commit r14-10630-g0562522e1290da08bc5a89182b9ae80c3cc9d1db Author: H.J. Lu Date: Fri Aug 23 05:36:45 2024 -0700 lto: Don't check obj.found for offload section obj.found is the number of LTO symbols. We should include

[gcc r14-10647] ipa: Don't disable function parameter analysis for fat LTO

https://gcc.gnu.org/g:6abedee0d4c8d40d412a358a3f6cb6090772d286 commit r14-10647-g6abedee0d4c8d40d412a358a3f6cb6090772d286 Author: H.J. Lu Date: Tue Aug 27 13:11:39 2024 -0700 ipa: Don't disable function parameter analysis for fat LTO Update analyze_parms not to disable function pa

[gcc r13-9006] ipa: Don't disable function parameter analysis for fat LTO

https://gcc.gnu.org/g:e83df98c8142235cda0bcd538907a4693e420c92 commit r13-9006-ge83df98c8142235cda0bcd538907a4693e420c92 Author: H.J. Lu Date: Tue Aug 27 13:11:39 2024 -0700 ipa: Don't disable function parameter analysis for fat LTO Update analyze_parms not to disable function par

[gcc r12-10699] ipa: Don't disable function parameter analysis for fat LTO

https://gcc.gnu.org/g:42d4aa02c6016cc8efd896f627f692896e68c914 commit r12-10699-g42d4aa02c6016cc8efd896f627f692896e68c914 Author: H.J. Lu Date: Tue Aug 27 13:11:39 2024 -0700 ipa: Don't disable function parameter analysis for fat LTO Update analyze_parms not to disable function pa

[gcc r15-3537] x86-64: Don't use temp for argument in a TImode register

https://gcc.gnu.org/g:fa7bbb065c63aa802e0bbb04d605407dad58cf94 commit r15-3537-gfa7bbb065c63aa802e0bbb04d605407dad58cf94 Author: H.J. Lu Date: Fri Sep 6 05:24:07 2024 -0700 x86-64: Don't use temp for argument in a TImode register Don't use temp for a PARALLEL BLKmode argument of a

[gcc r14-9775] tree-profile: Disable indirect call profiling for IFUNC resolvers

https://gcc.gnu.org/g:cab32bacaea268ec062b1fb4fc662d90c9d1cfce commit r14-9775-gcab32bacaea268ec062b1fb4fc662d90c9d1cfce Author: H.J. Lu Date: Mon Feb 26 08:38:58 2024 -0800 tree-profile: Disable indirect call profiling for IFUNC resolvers We can't profile indirect calls to IFUNC

[gcc r14-9791] x86: Define __APX_F__ for -mapxf

https://gcc.gnu.org/g:1df56719bd868c58466a549b25d7064dac3eb456 commit r14-9791-g1df56719bd868c58466a549b25d7064dac3eb456 Author: H.J. Lu Date: Thu Apr 4 08:05:58 2024 -0700 x86: Define __APX_F__ for -mapxf Define __APX_F__ when APX is enabled. gcc/ PR tar

[gcc r14-9820] x86: Use explicit shift count in double-precision shifts

https://gcc.gnu.org/g:06a7e7514af67d9f3c51fe7a592b5166da791e2f commit r14-9820-g06a7e7514af67d9f3c51fe7a592b5166da791e2f Author: H.J. Lu Date: Fri Apr 5 08:56:15 2024 -0700 x86: Use explicit shift count in double-precision shifts Don't use implicit shift count in double-precision

[gcc r14-9852] x86: Define __APX_INLINE_ASM_USE_GPR32__

https://gcc.gnu.org/g:18e94e04dae724c61cbc13ace85fa68f2deda900 commit r14-9852-g18e94e04dae724c61cbc13ace85fa68f2deda900 Author: H.J. Lu Date: Mon Apr 8 18:57:49 2024 -0700 x86: Define __APX_INLINE_ASM_USE_GPR32__ Define __APX_INLINE_ASM_USE_GPR32__ for -mapx-inline-asm-use-gpr32.

[gcc r14-9970] x86: Allow TImode offsettable memory only with 8-bit constant

https://gcc.gnu.org/g:a3281dd0f4b46c16ec1192ad411c0a96e6d086eb commit r14-9970-ga3281dd0f4b46c16ec1192ad411c0a96e6d086eb Author: H.J. Lu Date: Fri Apr 12 15:42:12 2024 -0700 x86: Allow TImode offsettable memory only with 8-bit constant The x86 instruction size limit is 15 bytes.

[gcc r13-8606] tree-profile: Disable indirect call profiling for IFUNC resolvers

https://gcc.gnu.org/g:abe3a80aa2d6d53cc9b8c9f7c531e065451d5b6e commit r13-8606-gabe3a80aa2d6d53cc9b8c9f7c531e065451d5b6e Author: H.J. Lu Date: Sun Apr 14 12:57:39 2024 -0700 tree-profile: Disable indirect call profiling for IFUNC resolvers We can't profile indirect calls to IFUNC

[gcc r12-10331] tree-profile: Disable indirect call profiling for IFUNC resolvers

https://gcc.gnu.org/g:23049e851ebf840dffdd3f062dba0e795be347f8 commit r12-10331-g23049e851ebf840dffdd3f062dba0e795be347f8 Author: H.J. Lu Date: Mon Feb 26 08:38:58 2024 -0800 tree-profile: Disable indirect call profiling for IFUNC resolvers We can't profile indirect calls to IFUNC

[gcc r11-11321] tree-profile: Disable indirect call profiling for IFUNC resolvers

https://gcc.gnu.org/g:574d52a9b6e40a466b90f4810e72d3dd072d5160 commit r11-11321-g574d52a9b6e40a466b90f4810e72d3dd072d5160 Author: H.J. Lu Date: Mon Feb 26 08:38:58 2024 -0800 tree-profile: Disable indirect call profiling for IFUNC resolvers We can't profile indirect calls to IFUNC

[gcc r15-4275] gcc.target/i386: Replace long with long long

https://gcc.gnu.org/g:c92477e00068811be31c18428904e0d585fa5236 commit r15-4275-gc92477e00068811be31c18428904e0d585fa5236 Author: H.J. Lu Date: Thu Oct 10 17:22:36 2024 +0800 gcc.target/i386: Replace long with long long Since long is 64-bit for x32, replace long with long long for

[gcc r15-4273] gcc.target/i386/pr115407.c: Only run for lp64

https://gcc.gnu.org/g:3ba65a7f2d9ff85cd818a3115f71b2946f34a0ff commit r15-4273-g3ba65a7f2d9ff85cd818a3115f71b2946f34a0ff Author: H.J. Lu Date: Thu Oct 10 17:29:27 2024 +0800 gcc.target/i386/pr115407.c: Only run for lp64 Since -mcmodel=large is valid only for lp64, run pr115407.c o

[gcc r15-4274] g++.target/i386/pr105953.C: Skip for x32

https://gcc.gnu.org/g:69f91fbd47722f84edaa7a20d972912181ef97fb commit r15-4274-g69f91fbd47722f84edaa7a20d972912181ef97fb Author: H.J. Lu Date: Thu Oct 10 19:00:32 2024 +0800 g++.target/i386/pr105953.C: Skip for x32 Since -mabi=ms isn't supported for x32, skip g++.target/i386/pr105

[gcc r15-4080] x86: Disable stack protector for naked functions

https://gcc.gnu.org/g:7d2845da112214f064e7b24531cc67e256b5177e commit r15-4080-g7d2845da112214f064e7b24531cc67e256b5177e Author: H.J. Lu Date: Fri Oct 4 16:21:15 2024 +0800 x86: Disable stack protector for naked functions Since naked functions should not enable stack protector, de

[gcc r13-9085] x86: Disable stack protector for naked functions

https://gcc.gnu.org/g:bd9f62324853686c65e1b4331a187102e1e526b0 commit r13-9085-gbd9f62324853686c65e1b4331a187102e1e526b0 Author: H.J. Lu Date: Fri Oct 4 16:21:15 2024 +0800 x86: Disable stack protector for naked functions Since naked functions should not enable stack protector, de

[gcc r12-10742] x86: Disable stack protector for naked functions

https://gcc.gnu.org/g:7a51946e00fa2fb2ffacdd7c8d0a80e056c1f7ff commit r12-10742-g7a51946e00fa2fb2ffacdd7c8d0a80e056c1f7ff Author: H.J. Lu Date: Fri Oct 4 16:21:15 2024 +0800 x86: Disable stack protector for naked functions Since naked functions should not enable stack protector, d

[gcc r14-10746] x86: Disable stack protector for naked functions

https://gcc.gnu.org/g:1032b72548c47a199e0407c69d6740d6c3341f43 commit r14-10746-g1032b72548c47a199e0407c69d6740d6c3341f43 Author: H.J. Lu Date: Fri Oct 4 16:21:15 2024 +0800 x86: Disable stack protector for naked functions Since naked functions should not enable stack protector, d

[gcc r15-4287] gcc.target/i386/invariant-ternlog-1.c: Also scan (%edx)

https://gcc.gnu.org/g:a4ce8681929c597639ce382b2a0414e27c46725c commit r15-4287-ga4ce8681929c597639ce382b2a0414e27c46725c Author: H.J. Lu Date: Sat Oct 12 05:04:33 2024 +0800 gcc.target/i386/invariant-ternlog-1.c: Also scan (%edx) Since x32 uses (%edx), instead of (%rdx), also scan

[gcc r15-4288] gcc.target/i386/pr115749.c: Use word_mode integer

https://gcc.gnu.org/g:80d0e10847ec64799deb53061fb50876043116fe commit r15-4288-g80d0e10847ec64799deb53061fb50876043116fe Author: H.J. Lu Date: Sat Oct 12 05:22:52 2024 +0800 gcc.target/i386/pr115749.c: Use word_mode integer Use word_mode integer with func so that 64-bit integer is

[gcc r15-4289] gcc.target/i386/pr55583.c: Use long long for 64-bit integer

https://gcc.gnu.org/g:c1034d71a7f9ed446938b1c4ba7e7c95ba3a665f commit r15-4289-gc1034d71a7f9ed446938b1c4ba7e7c95ba3a665f Author: H.J. Lu Date: Sat Oct 12 06:15:28 2024 +0800 gcc.target/i386/pr55583.c: Use long long for 64-bit integer Since long is 32-bit for x32, use long long for

[gcc r15-4939] guality tests: Silence gdb debuginfod warning

https://gcc.gnu.org/g:c1d91adb572ca0c5f5e788b070e97c4fe744505a commit r15-4939-gc1d91adb572ca0c5f5e788b070e97c4fe744505a Author: H.J. Lu Date: Sun Oct 27 05:51:18 2024 +0800 guality tests: Silence gdb debuginfod warning When gdb defaults to use debuginfod, gdb warns guality tests:

[gcc r15-4941] simulate-thread tests: Silence gdb debuginfod warning

https://gcc.gnu.org/g:8ae4a838bc0f5796369d982330acacf7a8fa7eab commit r15-4941-g8ae4a838bc0f5796369d982330acacf7a8fa7eab Author: H.J. Lu Date: Tue Nov 5 06:22:00 2024 +0800 simulate-thread tests: Silence gdb debuginfod warning When gdb defaults to use debuginfod, gdb warns simulat

[gcc r15-4972] Intel MOVRS tests: Also scan (%e.x)

https://gcc.gnu.org/g:d228a0729ff7d1f72f84bb910d765ead5706fed4 commit r15-4972-gd228a0729ff7d1f72f84bb910d765ead5706fed4 Author: H.J. Lu Date: Wed Nov 6 08:14:04 2024 +0800 Intel MOVRS tests: Also scan (%e.x) Since x32 uses (%reg32), instead of (%r.x), also scan (%e.x).

[gcc r15-4971] gcc.target/i386/apx-ndd.c: Also scan (%edi)

https://gcc.gnu.org/g:c4155653e6ffe05b032702e9de256893e0245284 commit r15-4971-gc4155653e6ffe05b032702e9de256893e0245284 Author: H.J. Lu Date: Wed Nov 6 07:44:24 2024 +0800 gcc.target/i386/apx-ndd.c: Also scan (%edi) Since x32 uses (%edi), instead of (%rdi), also scan (%edi).

[gcc r15-4711] gcc.target/i386/pr53533-[13].c: Adjust assembly scan

https://gcc.gnu.org/g:f1823d8037e355cd755087e695051d190ffe755e commit r15-4711-gf1823d8037e355cd755087e695051d190ffe755e Author: H.J. Lu Date: Sat Oct 12 05:53:49 2024 +0800 gcc.target/i386/pr53533-[13].c: Adjust assembly scan Before 1089d083117 Simplify (B * v + C) * D -

[gcc r14-10716] x86: Don't use address override with segment regsiter

https://gcc.gnu.org/g:25cb153f93bb9ff3543ba8e31bbe7be4f6168aa4 commit r14-10716-g25cb153f93bb9ff3543ba8e31bbe7be4f6168aa4 Author: H.J. Lu Date: Wed Sep 25 16:39:04 2024 +0800 x86: Don't use address override with segment regsiter Address override only applies to the (reg32) part in

[gcc r12-10731] x86: Don't use address override with segment regsiter

https://gcc.gnu.org/g:2e66eb7e7eae82bcd6675e79eabbdd6decfa9fe5 commit r12-10731-g2e66eb7e7eae82bcd6675e79eabbdd6decfa9fe5 Author: H.J. Lu Date: Wed Sep 25 16:39:04 2024 +0800 x86: Don't use address override with segment regsiter Address override only applies to the (reg32) part in

[gcc r13-9060] x86: Don't use address override with segment regsiter

https://gcc.gnu.org/g:bf5d8d44f7a8f90a2ebfe3f28689bc3d86e185fb commit r13-9060-gbf5d8d44f7a8f90a2ebfe3f28689bc3d86e185fb Author: H.J. Lu Date: Wed Sep 25 16:39:04 2024 +0800 x86: Don't use address override with segment regsiter Address override only applies to the (reg32) part in

[gcc r15-3875] x86: Don't use address override with segment regsiter

https://gcc.gnu.org/g:c79cc30862d7255ca15884aa956d1ccfa279d86a commit r15-3875-gc79cc30862d7255ca15884aa956d1ccfa279d86a Author: H.J. Lu Date: Wed Sep 25 16:39:04 2024 +0800 x86: Don't use address override with segment regsiter Address override only applies to the (reg32) part in

[gcc r15-4992] avx10_2-comibf-2.c: Require AVX10.2 support

https://gcc.gnu.org/g:859ce74dc25b9e77faa10144f981585bd3e00edc commit r15-4992-g859ce74dc25b9e77faa10144f981585bd3e00edc Author: H.J. Lu Date: Wed Nov 6 16:14:38 2024 +0800 avx10_2-comibf-2.c: Require AVX10.2 support Since avx10_2-comibf-2.c is a run test, require AVX10.2 support.

[gcc r15-5660] sibcall: Check partial != 0 for BLKmode argument

https://gcc.gnu.org/g:c61576d89eb0fead37be39fcf0764bb915ea201f commit r15-5660-gc61576d89eb0fead37be39fcf0764bb915ea201f Author: H.J. Lu Date: Sun Oct 13 04:53:14 2024 +0800 sibcall: Check partial != 0 for BLKmode argument The outgoing stack slot size may be different from the BLK

[gcc r15-5858] x86: Correct comments for pass_apx_nf_convert

https://gcc.gnu.org/g:e4dd0075aa998d522edd0da552d60a942eaae78a commit r15-5858-ge4dd0075aa998d522edd0da552d60a942eaae78a Author: H.J. Lu Date: Mon Dec 2 13:10:46 2024 +0800 x86: Correct comments for pass_apx_nf_convert Change pass_rpad to pass_apx_nf_convert in pass_apx_nf_convert

[gcc r15-7302] force-indirect-call-2.c: Allow indirect branch via GOT

https://gcc.gnu.org/g:5f34558100e8466aa70373e2f930bf1013192ba8 commit r15-7302-g5f34558100e8466aa70373e2f930bf1013192ba8 Author: H.J. Lu Date: Fri Jan 31 18:28:23 2025 +0800 force-indirect-call-2.c: Allow indirect branch via GOT r15-1619-g3b9b8d6cfdf593 changed the codegen from

[gcc r15-7436] x86: Verify that PUSH/POP can be skipped

https://gcc.gnu.org/g:846837c2406ae7a52d9123b29c13e4b8b9d14224 commit r15-7436-g846837c2406ae7a52d9123b29c13e4b8b9d14224 Author: H.J. Lu Date: Fri Feb 7 13:49:30 2025 +0800 x86: Verify that PUSH/POP can be skipped For int f(int); int advance(int dz) {

[gcc r15-7400] ira: Add a target hook for callee-saved register cost scale

https://gcc.gnu.org/g:d3ff498c478acefce35de04402f99171b4f64a1a commit r15-7400-gd3ff498c478acefce35de04402f99171b4f64a1a Author: H.J. Lu Date: Sun Feb 2 07:10:55 2025 +0800 ira: Add a target hook for callee-saved register cost scale commit 3b9b8d6cfdf59337f4b7ce10ce92a98044b2657b

[gcc r13-9371] x86: Correct ASM_OUTPUT_SYMBOL_REF

https://gcc.gnu.org/g:0a1c9d03309ff1e507f7ea347fe8cc12bf669296 commit r13-9371-g0a1c9d03309ff1e507f7ea347fe8cc12bf669296 Author: H.J. Lu Date: Tue Feb 11 13:47:54 2025 +0800 x86: Correct ASM_OUTPUT_SYMBOL_REF x is not a macro argument. It just happens to work as final.cc passes

[gcc r14-11301] x86: Correct ASM_OUTPUT_SYMBOL_REF

https://gcc.gnu.org/g:5f47dc6e9aa82e1c00ed030cb9469cd84df8691d commit r14-11301-g5f47dc6e9aa82e1c00ed030cb9469cd84df8691d Author: H.J. Lu Date: Tue Feb 11 13:47:54 2025 +0800 x86: Correct ASM_OUTPUT_SYMBOL_REF x is not a macro argument. It just happens to work as final.cc passes

[gcc r12-10950] x86: Correct ASM_OUTPUT_SYMBOL_REF

https://gcc.gnu.org/g:bd52571d713749f1a4cf0f58ca4922dbc42b5752 commit r12-10950-gbd52571d713749f1a4cf0f58ca4922dbc42b5752 Author: H.J. Lu Date: Tue Feb 11 13:47:54 2025 +0800 x86: Correct ASM_OUTPUT_SYMBOL_REF x is not a macro argument. It just happens to work as final.cc passes

[gcc r15-7469] x86: Correct ASM_OUTPUT_SYMBOL_REF

https://gcc.gnu.org/g:7317fc0b03380a83ad03a5fc4fabef5f38c44c9d commit r15-7469-g7317fc0b03380a83ad03a5fc4fabef5f38c44c9d Author: H.J. Lu Date: Tue Feb 11 13:47:54 2025 +0800 x86: Correct ASM_OUTPUT_SYMBOL_REF x is not a macro argument. It just happens to work as final.cc passes

[gcc r15-7321] x86: Add a test for PR rtl-optimization/111673

https://gcc.gnu.org/g:e8262c9041feddd7446840a9532cf458452f3587 commit r15-7321-ge8262c9041feddd7446840a9532cf458452f3587 Author: H.J. Lu Date: Sun Feb 2 06:46:29 2025 +0800 x86: Add a test for PR rtl-optimization/111673 Add a test for the target independent bug, PR rtl-optimizatio

[gcc r15-7320] x86: Change "if (TARGET_X32 ...)" back to "else if (TARGET_X32 ...)"

https://gcc.gnu.org/g:dceec9efbd19b50ff9e5268b9bc35d5c44b2f6e2 commit r15-7320-gdceec9efbd19b50ff9e5268b9bc35d5c44b2f6e2 Author: H.J. Lu Date: Sun Feb 2 05:46:18 2025 +0800 x86: Change "if (TARGET_X32 ...)" back to "else if (TARGET_X32 ...)" Update commit dd6247cb8fc11a15

[gcc r15-7318] x86: Handle TARGET_INDIRECT_BRANCH_REGISTER for -fno-plt

https://gcc.gnu.org/g:dd6247cb8fc11a15e23e949092f89d24ff329209 commit r15-7318-gdd6247cb8fc11a15e23e949092f89d24ff329209 Author: H.J. Lu Date: Fri Jan 31 12:29:04 2025 +0800 x86: Handle TARGET_INDIRECT_BRANCH_REGISTER for -fno-plt If TARGET_INDIRECT_BRANCH_REGISTER is true, indire

[gcc r15-7315] x86: Add a -mstack-protector-guard=global test

https://gcc.gnu.org/g:b38efaf36058b40aaf8659a9348815110242ced8 commit r15-7315-gb38efaf36058b40aaf8659a9348815110242ced8 Author: H.J. Lu Date: Sat Feb 1 18:06:33 2025 +0800 x86: Add a -mstack-protector-guard=global test Verify that -mstack-protector-guard=global works on x86. Def

[gcc r15-5562] apx-ndd-tls-1[ab].c: Add -std=gnu17

https://gcc.gnu.org/g:42a8005c636d5eb8acff55cb86de98dcaf5a29ff commit r15-5562-g42a8005c636d5eb8acff55cb86de98dcaf5a29ff Author: H.J. Lu Date: Thu Nov 21 19:08:03 2024 +0800 apx-ndd-tls-1[ab].c: Add -std=gnu17 Since GCC 15 defaults to -std=gnu23, add -std=gnu17 to apx-ndd-tls-1[ab

[gcc r15-6728] ree: Skip extension on fixed register

https://gcc.gnu.org/g:14879ba89a4f9d2263472dca1423b584c1236586 commit r15-6728-g14879ba89a4f9d2263472dca1423b584c1236586 Author: H.J. Lu Date: Wed Jan 8 20:50:04 2025 +0800 ree: Skip extension on fixed register Skip extension on fixed register since we can't turn (insn 27

[gcc r15-7573] x86: Properly find the maximum stack slot alignment

https://gcc.gnu.org/g:11902be7a57c0ccf03786aa0255fffaf0f54dbf9 commit r15-7573-g11902be7a57c0ccf03786aa0255fffaf0f54dbf9 Author: H.J. Lu Date: Tue Mar 14 11:41:51 2023 -0700 x86: Properly find the maximum stack slot alignment Don't assume that stack slots can only be accessed by s

[gcc r15-8240] gcc.dg/pr90838-2.c: Replace long with long long

https://gcc.gnu.org/g:456f5ef81f0c6de630a60c26341082fffd48f241 commit r15-8240-g456f5ef81f0c6de630a60c26341082fffd48f241 Author: H.J. Lu Date: Mon Mar 17 15:02:35 2025 -0700 gcc.dg/pr90838-2.c: Replace long with long long Since gcc.dg/pr90838-2.c is only for 64-bit integer, replac

[gcc r16-44] x86: Add tests for PR target/117863

https://gcc.gnu.org/g:a9fc1b9dec92842b3a978183388c1833918776fd commit r16-44-ga9fc1b9dec92842b3a978183388c1833918776fd Author: H.J. Lu Date: Sun Apr 20 15:09:00 2025 +0800 x86: Add tests for PR target/117863 commit 546f28f83ceba74dc8bf84b0435c0159ffca971a Author: Richard Sandi

[gcc r16-171] i386: Adjust apx-ndd.c for frontend promotion removal

https://gcc.gnu.org/g:cdb239bd213524a43b38ad8fca8e7ed0b5fb41eb commit r16-171-gcdb239bd213524a43b38ad8fca8e7ed0b5fb41eb Author: H.J. Lu Date: Sun Nov 10 11:27:14 2024 +0800 i386: Adjust apx-ndd.c for frontend promotion removal Since the C frontend no longer promotes integer argume

[gcc r16-170] Drop targetm.promote_prototypes from C, C++ and Ada frontends

https://gcc.gnu.org/g:a670ebde3995481225ec62b29686ec07a21e5c10 commit r16-170-ga670ebde3995481225ec62b29686ec07a21e5c10 Author: H.J. Lu Date: Thu Nov 21 07:54:35 2024 +0800 Drop targetm.promote_prototypes from C, C++ and Ada frontends Remove the targetm.calls.promote_prototypes ca

[gcc r16-172] vect-simd-clone-1[6-8][cd].c: Expect in-branch clones for x86

https://gcc.gnu.org/g:f9f81d5017adc5d860b24f67aeb89b4e79c7ebdb commit r16-172-gf9f81d5017adc5d860b24f67aeb89b4e79c7ebdb Author: H.J. Lu Date: Sun Nov 10 16:41:10 2024 +0800 vect-simd-clone-1[6-8][cd].c: Expect in-branch clones for x86 Since the C frontend no longer promotes char a

[gcc r16-194] x86: Properly find the maximum stack slot alignment

https://gcc.gnu.org/g:b9ea3b2ef98048f93b02fcd6ff51777bce1676c2 commit r16-194-gb9ea3b2ef98048f93b02fcd6ff51777bce1676c2 Author: H.J. Lu Date: Tue Mar 14 11:41:51 2023 -0700 x86: Properly find the maximum stack slot alignment Don't assume that stack slots can only be accessed by st

[gcc r16-169] Honor TARGET_PROMOTE_PROTOTYPES during RTL expand

https://gcc.gnu.org/g:78db4753c9646a372512e6a951fced12f74de0bc commit r16-169-g78db4753c9646a372512e6a951fced12f74de0bc Author: H.J. Lu Date: Thu Nov 21 08:11:06 2024 +0800 Honor TARGET_PROMOTE_PROTOTYPES during RTL expand Promote integer arguments smaller than int if TARGET_PROMO

[gcc r16-173] scev-cast.c: Enable for all targets and adjust scan matches

https://gcc.gnu.org/g:de8648def762e3b54200dd3cd5c6fb480b228579 commit r16-173-gde8648def762e3b54200dd3cd5c6fb480b228579 Author: H.J. Lu Date: Sun Nov 10 16:50:46 2024 +0800 scev-cast.c: Enable for all targets and adjust scan matches Since the C frontend no longer promotes char arg

[gcc r16-174] ssa-fre-4.c: Enable for all targets and adjust scan match

https://gcc.gnu.org/g:f962f594e9006651379dafc9ef039be9654e6291 commit r16-174-gf962f594e9006651379dafc9ef039be9654e6291 Author: H.J. Lu Date: Sun Nov 10 17:55:20 2024 +0800 ssa-fre-4.c: Enable for all targets and adjust scan match Since the C frontend no longer promotes char argum

[gcc r15-9431] APX: Don't use red-zone with 32 GPRs and no caller-saved registers

https://gcc.gnu.org/g:0a074b8c7e79f9d9359d044f1499b0a9ce9d2801 commit r15-9431-g0a074b8c7e79f9d9359d044f1499b0a9ce9d2801 Author: H.J. Lu Date: Sun Apr 13 12:20:42 2025 -0700 APX: Don't use red-zone with 32 GPRs and no caller-saved registers Don't use red-zone when there are no cal

[gcc r14-11642] APX: Don't use red-zone with 32 GPRs and no caller-saved registers

https://gcc.gnu.org/g:a33e2808c8987dcd422c5156c47bcf672ddc7f9f commit r14-11642-ga33e2808c8987dcd422c5156c47bcf672ddc7f9f Author: H.J. Lu Date: Sun Apr 13 12:20:42 2025 -0700 APX: Don't use red-zone with 32 GPRs and no caller-saved registers Don't use red-zone when there are no ca

[gcc r14-11641] Extend check-function-bodies to allow label and directives

https://gcc.gnu.org/g:d275b3748a23aa4b6b821ae3bdf1751010923773 commit r14-11641-gd275b3748a23aa4b6b821ae3bdf1751010923773 Author: H.J. Lu Date: Tue Aug 27 07:03:22 2024 -0700 Extend check-function-bodies to allow label and directives As PR target/116174 shown, we may need to verif

[gcc r14-11643] x86: Update gcc.target/i386/apx-interrupt-1.c

https://gcc.gnu.org/g:8cc672d3d3a2f090d840fb2a8c344cf927715d6c commit r14-11643-g8cc672d3d3a2f090d840fb2a8c344cf927715d6c Author: H.J. Lu Date: Mon Apr 14 15:49:26 2025 -0700 x86: Update gcc.target/i386/apx-interrupt-1.c ix86_add_cfa_restore_note omits the REG_CFA_RESTORE REG note

[gcc r15-9503] x86: Update gcc.target/i386/apx-interrupt-1.c

https://gcc.gnu.org/g:5ed2fa4768f3d318b8ace5bd4a095596e06fad7b commit r15-9503-g5ed2fa4768f3d318b8ace5bd4a095596e06fad7b Author: H.J. Lu Date: Mon Apr 14 15:49:26 2025 -0700 x86: Update gcc.target/i386/apx-interrupt-1.c ix86_add_cfa_restore_note omits the REG_CFA_RESTORE REG note

[gcc r16-271] x86: Add a pass to remove redundant all 0s/1s vector load

https://gcc.gnu.org/g:d1cada7481420a23fbec525548ef5bdf64839a34 commit r16-271-gd1cada7481420a23fbec525548ef5bdf64839a34 Author: H.J. Lu Date: Fri Nov 29 18:22:14 2024 +0800 x86: Add a pass to remove redundant all 0s/1s vector load For all different modes of all 0s/1s vectors, we c

[gcc r16-270] i386: Add ix86_expand_unsigned_small_int_cst_argument

https://gcc.gnu.org/g:a0a64aa5da0af5ecb022675cdb9140ccfa098ce3 commit r16-270-ga0a64aa5da0af5ecb022675cdb9140ccfa098ce3 Author: H.J. Lu Date: Tue Nov 12 09:03:31 2024 +0800 i386: Add ix86_expand_unsigned_small_int_cst_argument When passing 0xff as an unsigned char function argumen

[gcc r16-275] target.def: Remove TARGET_PROMOTE_FUNCTION_RETURN reference

https://gcc.gnu.org/g:0f3a6b3972f6e6886297e59fcaf85f374859ca46 commit r16-275-g0f3a6b3972f6e6886297e59fcaf85f374859ca46 Author: H.J. Lu Date: Tue Apr 29 09:44:29 2025 +0800 target.def: Remove TARGET_PROMOTE_FUNCTION_RETURN reference Since TARGET_PROMOTE_FUNCTION_RETURN is no longe

[gcc r15-7745] x86: Move TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P to i386.cc

https://gcc.gnu.org/g:075611b646e5554ae02b2622061ea1614bf16ead commit r15-7745-g075611b646e5554ae02b2622061ea1614bf16ead Author: H.J. Lu Date: Wed Feb 26 05:57:13 2025 +0800 x86: Move TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P to i386.cc Move the TARGET_SMALL_REGISTER_CLASSES_FOR_MO

[gcc r15-7895] ira: Add new hooks for callee-save vs spills [PR117477]

https://gcc.gnu.org/g:b191e8bdecf881d11c1544c441e38f4c18392a15 commit r15-7895-gb191e8bdecf881d11c1544c441e38f4c18392a15 Author: Richard Sandiford Date: Thu Mar 6 11:06:25 2025 + ira: Add new hooks for callee-save vs spills [PR117477] Following on from the discussion in:

[gcc r15-7957] i386: Verify that argument registers are spilled properly

https://gcc.gnu.org/g:06440e726acfa9c9695a07dc524a832a53057ad6 commit r15-7957-g06440e726acfa9c9695a07dc524a832a53057ad6 Author: H.J. Lu Date: Sun Mar 9 07:00:23 2025 -0700 i386: Verify that argument registers are spilled properly While working on a local x86 patch, which passed t

[gcc r15-7666] Append a newline in debug_edge

https://gcc.gnu.org/g:700f049b66fa1a71001a5ab383580605e1bbd4d6 commit r15-7666-g700f049b66fa1a71001a5ab383580605e1bbd4d6 Author: H.J. Lu Date: Fri Feb 21 10:31:04 2025 +0800 Append a newline in debug_edge Append a newline in debug_edge so that we get (gdb) call debug_edge

[gcc r15-7636] x86: Add a test for PR target/118936

https://gcc.gnu.org/g:83bc61c9fd6581d0a4c4ee16bdfdaeedcdd6ebcd commit r15-7636-g83bc61c9fd6581d0a4c4ee16bdfdaeedcdd6ebcd Author: H.J. Lu Date: Wed Feb 19 19:48:07 2025 +0800 x86: Add a test for PR target/118936 Add a test for PR target/118936 which was fixed by reverting:

[gcc r15-7635] Revert "x86: Properly find the maximum stack slot alignment"

https://gcc.gnu.org/g:6921c93d205203b239bf36cecc2258d202419ac6 commit r15-7635-g6921c93d205203b239bf36cecc2258d202419ac6 Author: H.J. Lu Date: Thu Feb 20 15:23:15 2025 +0800 Revert "x86: Properly find the maximum stack slot alignment" This reverts commit 11902be7a57c0ccf03786aa025

[gcc r15-7679] x86: Add tests for PR tree-optimization/82142

https://gcc.gnu.org/g:bf0aa9dc8826b1d2a71e52754c117228134825b5 commit r15-7679-gbf0aa9dc8826b1d2a71e52754c117228134825b5 Author: H.J. Lu Date: Mon Feb 24 05:44:40 2025 +0800 x86: Add tests for PR tree-optimization/82142 Verify that PR tree-optimization/82142 testcase is properly o

[gcc r15-7634] Revert "i386: Simplify PARALLEL RTX scan in ix86_find_all_reg_use"

https://gcc.gnu.org/g:0312d11be3f666a6b71461dc8a09e7aac64853eb commit r15-7634-g0312d11be3f666a6b71461dc8a09e7aac64853eb Author: H.J. Lu Date: Thu Feb 20 15:23:05 2025 +0800 Revert "i386: Simplify PARALLEL RTX scan in ix86_find_all_reg_use" This reverts commit 565d4e755498ad2b5ed5

[gcc r16-535] x86: Remove df_insn_rescan after emit_insn_*

https://gcc.gnu.org/g:9506c28a557bcea34af13478f05d2d9fc3727072 commit r16-535-g9506c28a557bcea34af13478f05d2d9fc3727072 Author: H.J. Lu Date: Mon May 12 10:02:24 2025 +0800 x86: Remove df_insn_rescan after emit_insn_* Since df_insn_rescan has been called by emit_insn_*, there is n

[gcc r16-519] x86: Change dest to src in replace_vector_const

https://gcc.gnu.org/g:ba9d228a92057d3b839e7ea32b12c93fcfc5ff1e commit r16-519-gba9d228a92057d3b839e7ea32b12c93fcfc5ff1e Author: H.J. Lu Date: Sun May 11 06:17:45 2025 +0800 x86: Change dest to src in replace_vector_const Replace rtx dest = SET_SRC (set); with

[gcc r16-1766] shrink_wrap_separate_check_lea.c: Scan lea(l|q)

https://gcc.gnu.org/g:0cd06c1da7a706330045e54a7516de2601341bc7 commit r16-1766-g0cd06c1da7a706330045e54a7516de2601341bc7 Author: H.J. Lu Date: Mon Jun 30 04:11:13 2025 +0800 shrink_wrap_separate_check_lea.c: Scan lea(l|q) Scan "lea(l|q)", instead of "leaq", to support x32.

[gcc r15-9966] x86-64: Add RDI clobber to tls_global_dynamic_64 patterns

https://gcc.gnu.org/g:3f6e48cdb1969dc718d702d045cc4d349f53f239 commit r15-9966-g3f6e48cdb1969dc718d702d045cc4d349f53f239 Author: H.J. Lu Date: Tue Jul 1 17:17:06 2025 +0800 x86-64: Add RDI clobber to tls_global_dynamic_64 patterns *tls_global_dynamic_64_ uses RDI as the __tls_get_

[gcc r15-9967] x86-64: Add RDI clobber to 64-bit dynamic TLS patterns

https://gcc.gnu.org/g:fcc6ce1a4934a45bfd4e8e21e118d3f1046d3d85 commit r15-9967-gfcc6ce1a4934a45bfd4e8e21e118d3f1046d3d85 Author: H.J. Lu Date: Thu Jul 3 10:54:39 2025 +0800 x86-64: Add RDI clobber to 64-bit dynamic TLS patterns *tls_global_dynamic_64_largepic, *tls_local_dynamic_6

[gcc r16-2321] x86: Don't change mode for XOR in ix86_expand_ternlog

https://gcc.gnu.org/g:c139a8814456f4f13202170600f2e28b1498830b commit r16-2321-gc139a8814456f4f13202170600f2e28b1498830b Author: H.J. Lu Date: Sun Mar 2 09:10:57 2025 +0800 x86: Don't change mode for XOR in ix86_expand_ternlog There is no need to change mode for XOR in ix86_expand

[gcc r13-9799] x86-64: Add RDI clobber to 64-bit dynamic TLS patterns

https://gcc.gnu.org/g:7e6a220b18df8ef13dde7c19407f4341ff16f091 commit r13-9799-g7e6a220b18df8ef13dde7c19407f4341ff16f091 Author: H.J. Lu Date: Thu Jul 3 10:54:39 2025 +0800 x86-64: Add RDI clobber to 64-bit dynamic TLS patterns *tls_global_dynamic_64_largepic, *tls_local_dynamic_6

[gcc r13-9798] x86-64: Add RDI clobber to tls_global_dynamic_64 patterns

https://gcc.gnu.org/g:536ed87cfb3a1453730411f217fa119b87ffaf90 commit r13-9798-g536ed87cfb3a1453730411f217fa119b87ffaf90 Author: H.J. Lu Date: Tue Jul 1 17:17:06 2025 +0800 x86-64: Add RDI clobber to tls_global_dynamic_64 patterns *tls_global_dynamic_64_ uses RDI as the __tls_get_

[gcc r14-11896] x86-64: Add RDI clobber to 64-bit dynamic TLS patterns

https://gcc.gnu.org/g:59db34888d289dae8fae2bcbf5e435be53da0edc commit r14-11896-g59db34888d289dae8fae2bcbf5e435be53da0edc Author: H.J. Lu Date: Thu Jul 3 10:54:39 2025 +0800 x86-64: Add RDI clobber to 64-bit dynamic TLS patterns *tls_global_dynamic_64_largepic, *tls_local_dynamic_

[gcc r14-11895] x86-64: Add RDI clobber to tls_global_dynamic_64 patterns

https://gcc.gnu.org/g:4d929cd27e66c7d9c519cbcd77f12e1d58e85689 commit r14-11895-g4d929cd27e66c7d9c519cbcd77f12e1d58e85689 Author: H.J. Lu Date: Tue Jul 1 17:17:06 2025 +0800 x86-64: Add RDI clobber to tls_global_dynamic_64 patterns *tls_global_dynamic_64_ uses RDI as the __tls_get

[gcc r15-10012] libstdc++: Update some baseline_symbols.txt (x32)

https://gcc.gnu.org/g:f000ed0a034cc99cdc17eb5cfc8f8258f883ed44 commit r15-10012-gf000ed0a034cc99cdc17eb5cfc8f8258f883ed44 Author: H.J. Lu Date: Wed Jul 9 09:43:52 2025 +0800 libstdc++: Update some baseline_symbols.txt (x32) * config/abi/post/x86_64-linux-gnu/x32/baseline_s

[gcc r16-1914] x86-64: Add RDI clobber to tls_global_dynamic_64 patterns

https://gcc.gnu.org/g:7710d513a552f1fa1b7485ec6b318bafaa6d4cd7 commit r16-1914-g7710d513a552f1fa1b7485ec6b318bafaa6d4cd7 Author: H.J. Lu Date: Tue Jul 1 17:17:06 2025 +0800 x86-64: Add RDI clobber to tls_global_dynamic_64 patterns *tls_global_dynamic_64_ uses RDI as the __tls_get_

[gcc r16-2047] x86: Improve vector_loop/unrolled_loop for memset/memcpy

https://gcc.gnu.org/g:401199377c50045ede560daf3f6e8b51749c2a87 commit r16-2047-g401199377c50045ede560daf3f6e8b51749c2a87 Author: H.J. Lu Date: Tue Jun 17 10:17:17 2025 +0800 x86: Improve vector_loop/unrolled_loop for memset/memcpy 1. Don't generate the loop if the loop count is 1.

[gcc r16-2072] check-function-bodies: Support "^[0-9]+:"

https://gcc.gnu.org/g:3e34c54d72f6e3723601bcd936409af4a42d17b8 commit r16-2072-g3e34c54d72f6e3723601bcd936409af4a42d17b8 Author: H.J. Lu Date: Wed Jul 2 08:51:47 2025 +0800 check-function-bodies: Support "^[0-9]+:" While working on https://gcc.gnu.org/bugzilla/show_bug.cg

[gcc r16-2232] x86-64: Add --enable-x86-64-mfentry

https://gcc.gnu.org/g:07d8de9174c421d719649639a1452b8b9f2eee32 commit r16-2232-g07d8de9174c421d719649639a1452b8b9f2eee32 Author: H.J. Lu Date: Wed Jul 2 08:58:23 2025 +0800 x86-64: Add --enable-x86-64-mfentry When profiling is enabled with shrink wrapping, the mcount call may not

[gcc r16-1690] x86: Add debug dump for the remove_redundant_vector pass

https://gcc.gnu.org/g:b8b08a8514003280050003d6d56657cb1b71fb88 commit r16-1690-gb8b08a8514003280050003d6d56657cb1b71fb88 Author: H.J. Lu Date: Sat May 10 16:57:58 2025 +0800 x86: Add debug dump for the remove_redundant_vector pass Add debug dump for the remove_redundant_vector pas

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