[gcc r15-54] Revert "decay vect tests from run to link for pr95401"

[Alexandre Oliva via Gcc-cvs]

https://gcc.gnu.org/g:93a9c40ea9764773f0288e5b7ba2d8399e670f2c

commit r15-54-g93a9c40ea9764773f0288e5b7ba2d8399e670f2c
Author: Alexandre Oliva <ol...@gnu.org>
Date:   Mon Apr 29 20:33:37 2024 -0300

    Revert "decay vect tests from run to link for pr95401"
    
    This reverts commit 05d83334d5bbeae01d71080f1da524810d6740d9.

Diff:
---
 gcc/testsuite/lib/target-supports.exp | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/gcc/testsuite/lib/target-supports.exp 
b/gcc/testsuite/lib/target-supports.exp
index 182d80129de..3a55b2a4159 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -11625,7 +11625,7 @@ proc check_vect_support_and_set_flags { } {
         if [check_750cl_hw_available] {
             set dg-do-what-default run
         } else {
-            set dg-do-what-default link
+            set dg-do-what-default compile
         }
     } elseif [istarget powerpc*-*-*] {
         # Skip targets not supporting -maltivec.
@@ -11655,14 +11655,14 @@ proc check_vect_support_and_set_flags { } {
                 # some other cpu type specified above.
                set DEFAULT_VECTCFLAGS [linsert $DEFAULT_VECTCFLAGS 0 
"-mcpu=970"]
             }
-            set dg-do-what-default link
+            set dg-do-what-default compile
         }
     } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
         lappend DEFAULT_VECTCFLAGS "-msse2"
         if { [check_effective_target_sse2_runtime] } {
             set dg-do-what-default run
         } else {
-            set dg-do-what-default link
+            set dg-do-what-default compile
         }
     } elseif { [istarget mips*-*-*]
               && [check_effective_target_nomips16] } {
@@ -11681,7 +11681,7 @@ proc check_vect_support_and_set_flags { } {
         if [check_effective_target_ultrasparc_hw] {
             set dg-do-what-default run
         } else {
-            set dg-do-what-default link
+            set dg-do-what-default compile
         }
     } elseif [istarget alpha*-*-*] {
         # Alpha's vectorization capabilities are extremely limited.
@@ -11694,7 +11694,7 @@ proc check_vect_support_and_set_flags { } {
         if [check_alpha_max_hw_available] {
             set dg-do-what-default run
         } else {
-            set dg-do-what-default link
+            set dg-do-what-default compile
         }
     } elseif [istarget ia64-*-*] {
         set dg-do-what-default run
@@ -11707,7 +11707,7 @@ proc check_vect_support_and_set_flags { } {
         if [is-effective-target arm_neon_hw] {
             set dg-do-what-default run
         } else {
-            set dg-do-what-default link
+            set dg-do-what-default compile
         }
     } elseif [istarget aarch64*-*-*] {
         set dg-do-what-default run
@@ -11731,7 +11731,7 @@ proc check_vect_support_and_set_flags { } {
             set dg-do-what-default run
         } else {
            lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
-            set dg-do-what-default link
+            set dg-do-what-default compile
         }
     } elseif [istarget amdgcn-*-*] {
         set dg-do-what-default run
@@ -11742,7 +11742,7 @@ proc check_vect_support_and_set_flags { } {
            foreach item [add_options_for_riscv_v ""] {
                lappend DEFAULT_VECTCFLAGS $item
            }
-           set dg-do-what-default link
+           set dg-do-what-default compile
        }
     } elseif [istarget loongarch*-*-*] {
       # Set the default vectorization option to "-mlsx" due to the problem
@@ -11751,7 +11751,7 @@ proc check_vect_support_and_set_flags { } {
       if [check_effective_target_loongarch_sx_hw] {
          set dg-do-what-default run
       } else {
-         set dg-do-what-default link
+         set dg-do-what-default compile
       }
     } else {
         return 0