[PATCH] Fix cxx_eval_bit_field_ref (PR c++/49136)

2011-05-25 Thread Jakub Jelinek
Hi! optimize_bit_field_compare during folding can create BIT_FIELD_REFs that reference more than a single bitfield, then mask the right bits from it. The following patch changes cxx_eval_bit_field_ref to be able to read the multiple fields from the constructor. Bootstrapped/regtested on

[PATCH] Fix a typo in i386 host_detect_local_cpu (PR target/49128)

2011-05-25 Thread Jakub Jelinek
Hi! Committed as obvious. 2011-05-25 Jakub Jelinek ja...@redhat.com PR target/49128 * config/i386/driver-i386.c (host_detect_local_cpu): Fix a typo. --- gcc/config/i386/driver-i386.c (revision 174170) +++ gcc/config/i386/driver-i386.c (revision 174171) @@ -696,7

Fix PR 49014

2011-05-25 Thread Andrey Belevantsev
Hello, This patch fixes PR 49014, yet another case of the insn with wrong reservation. Approved by Uros in the PR audit trail, bootstrapped and regtested on x86-64/linux and committed to trunk. Vlad, Bernd, I wonder if we can avoid having recog_memoized =0 insns that do not have proper DFA

Re: [patch][simplify-rtx] Fix 16-bit - 64-bit multiply and accumulate

2011-05-25 Thread Andrew Stubbs
On 24/05/11 20:35, Joseph S. Myers wrote: On Tue, 24 May 2011, Andrew Stubbs wrote: I've created this new, simpler patch that converts (extend (mult a b)) into (mult (extend a) (extend b)) regardless of what 'a' and 'b' might be. (These are then simplified and superfluous extends

Re: [testsuite] remove XFAIL for all but ia64 for g++.dg/tree-ssa/pr43411.C

2011-05-25 Thread Rainer Orth
Janis Johnson jani...@codesourcery.com writes: Archived test results for 4.7.0 for most processors with C++ results have: XPASS: g++.dg/tree-ssa/pr43411.C scan-tree-dump-not optimized OBJ_TYPE_REF The only failures I could find were for ia64-linux and ia64-hpux. This patch changes the

Re: [PING][PATCH 13/18] move TS_EXP to be a substructure of TS_TYPED

2011-05-25 Thread Richard Guenther
On Tue, May 24, 2011 at 7:34 PM, Nathan Froyd froy...@codesourcery.com wrote: `0On Mon, May 23, 2011 at 04:58:06PM +0200, Richard Guenther wrote: On Mon, May 23, 2011 at 4:18 PM, Nathan Froyd froy...@codesourcery.com wrote: On 05/17/2011 11:31 AM, Nathan Froyd wrote: On 05/10/2011 04:18

Re: [PATCH] Expand pow(x,n) into mulitplies in cse_sincos pass (PR46728, patch 2)

2011-05-25 Thread Richard Guenther
On Tue, May 24, 2011 at 10:35 PM, William J. Schmidt wschm...@linux.vnet.ibm.com wrote: Here's a small patch to expand pow(x,n) for integer n using the powi(x,n) logic in the cse_sincos pass.  OK for trunk? For the next patch, I'll plan on expanding pow(x,n) for n in {0.5, 0.25, 0.75, 1./3.,

Re: C6X port 4/11: Backtracking scheduler

2011-05-25 Thread Hans-Peter Nilsson
On Tue, 10 May 2011, Bernd Schmidt wrote: On C6X, every jump instruction has 5 delay slots which can be filled with normally scheduled instructions. With an issue width of 8 insns/cycle, this means that up to 40 insns can be issued after the jump insn before the jump's side-effect takes place.

Re: Patch ping #2

2011-05-25 Thread Richard Guenther
On Wed, May 25, 2011 at 12:00 AM, Eric Botcazou ebotca...@adacore.com wrote: Yes, I mean when -fstack-usage is enabled.  Thus, make -fstack-usage -Wframe-larger-than behave the same as -fstack-usage -Wstack-usage.  Or do you say that -Wstack-usage doesn't require -fstack-usage? Yes,

Faster streaming of enums

2011-05-25 Thread Jan Hubicka
Hi, after fixing 1 byte i/o function call and most of hash table overhead, functions to handle ulebs and slebs shows top in profile. We use them in many cases where we know value range of the operand will fit in 1 byte. In particular to handle enums. This is also dangerous since we generally

[v3] libstdc++/49141

2011-05-25 Thread Paolo Carlini
Hi, committed to mainline and 4_6-branch. Thanks, Paolo. 2011-05-24 Paolo Carlini paolo.carl...@oracle.com PR libstdc++/49141 * testsuite/26_numerics/complex/cons/48760.cc: Use dg-require-c-std. *

Re: C6X port 9/11: Allow defining attributes in terms of another

2011-05-25 Thread Bernd Schmidt
On 05/25/2011 08:56 AM, Hans-Peter Nilsson wrote: On Tue, 10 May 2011, Bernd Schmidt wrote: I've found it useful to use a construct such as the following: (define_attr units64 unknown,d,d_addr,l,m,s,dl,ds,dls,ls (const_string unknown)) (define_attr units64p

Re: Faster streaming of enums

2011-05-25 Thread Richard Guenther
On Wed, May 25, 2011 at 11:45 AM, Jan Hubicka hubi...@ucw.cz wrote: Hi, after fixing 1 byte i/o function call and most of hash table overhead, functions to handle ulebs and slebs shows top in profile.  We use them in many cases where we know value range of the operand will fit in 1 byte. In

Re: Faster streaming of enums

2011-05-25 Thread Jan Hubicka
*** lto_output_tree (struct output_block *ob *** 1401,1407         will instantiate two different nodes for the same object.  */        output_record_start (ob, LTO_tree_pickle_reference);        output_uleb128 (ob, ix); !       output_uleb128 (ob, lto_tree_code_to_tag

Re: [patch][simplify-rtx] Fix 16-bit - 64-bit multiply and accumulate

2011-05-25 Thread Joseph S. Myers
On Wed, 25 May 2011, Andrew Stubbs wrote: So, you're saying that promoting a regular multiply to a widening multiply isn't a valid transformation anyway? I suppose that does make sense. I knew In general, yes. RTL always has modulo semantics (except for division and remainder by -1); all

Don't ICE in function_and_variable_visibility on Tru64 UNIX (PR middle-end/49062)

2011-05-25 Thread Rainer Orth
Almost 400 c++ and libstdc++ testcases ICE on Tru64 UNIX since Jan's patch 2011-05-06 Jan Hubicka j...@suse.cz * cgraph.c (cgraph_add_thunk): Create real function node instead of alias node; finalize it and mark needed/reachale; arrange visibility to be right and add it into the

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Andrew Haley
On 05/24/2011 07:28 PM, H.J. Lu wrote: This patch implements pause intrinsic suggested by Andi. OK for trunk? What does full memory barrier here mean? +@table @code +@item void __builtin_ia32_pause (void) +Generates the @code{pause} machine instruction with full memory barrier. +@end table

[PATCH] Ignore TYPE_DECLs for canonical type compute in LTO

2011-05-25 Thread Richard Guenther
Just figured that we'd get TYPE_DECLs and FUNCTION_DECLs in aggregate types. But we should treat layout-compatible structs as same, regardless of the above. LTO profile-bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2011-05-25 Richard Guenther rguent...@suse.de

Re: Faster streaming of enums

2011-05-25 Thread Richard Guenther
On Wed, 25 May 2011, Jan Hubicka wrote: *** lto_output_tree (struct output_block *ob *** 1401,1407         will instantiate two different nodes for the same object.  */        output_record_start (ob, LTO_tree_pickle_reference);        output_uleb128 (ob, ix); !

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Richard Guenther
On Wed, May 25, 2011 at 12:26 PM, Andrew Haley a...@redhat.com wrote: On 05/24/2011 07:28 PM, H.J. Lu wrote: This patch implements pause intrinsic suggested by Andi.  OK for trunk? What does full memory barrier here mean? +@table @code +@item void __builtin_ia32_pause (void) +Generates

4.6: do not divide by 0 on insane profile

2011-05-25 Thread Jan Hubicka
Hi, cgraph_decide_recursive_inlining may decide to divide by 0 when profile is read but it is small enough, so even count of 0 is considered as possibly hot. This particularly happens when profile was not really read after all. The problem is fixed on mainline differently. This patch just

Re: [patch ada]: Fix bootstrap for Ada

2011-05-25 Thread Kai Tietz
2011/5/24 Arnaud Charlet char...@adacore.com: I'm confused. The above looks wrong to me: it does not return an empty string, it returns a pointer to an uninitialized string, which cannot be right (and should generate a warning :-) No, static vars are implicitly zero initialized when

Re: [testsuite] remove XFAIL for all but ia64 for g++.dg/tree-ssa/pr43411.C

2011-05-25 Thread Jan Hubicka
Am Wed 25 May 2011 11:04:06 AM CEST schrieb Richard Guenther richard.guent...@gmail.com: On Wed, May 25, 2011 at 10:38 AM, Rainer Orth r...@cebitec.uni-bielefeld.de wrote: Janis Johnson jani...@codesourcery.com writes: Archived test results for 4.7.0 for most processors with C++ results

Re: [pph] Regularize Streaming (issue4528096)

2011-05-25 Thread Diego Novillo
On Tue, May 24, 2011 at 22:42, Lawrence Crowl cr...@google.com wrote:   For TEMPLATE_DECL, also stream DECL_MEMBER_TEMPLATE_P. We don't really need to handle this. DECL_MEMBER_TEMPLATE_P is using DECL_LANG_FLAG_1. All the lang_flag fields are already handled in pph_stream_unpack_value_fields

Re: PATCH: Add pause intrinsic

2011-05-25 Thread H.J. Lu
On Wed, May 25, 2011 at 3:26 AM, Andrew Haley a...@redhat.com wrote: On 05/24/2011 07:28 PM, H.J. Lu wrote: This patch implements pause intrinsic suggested by Andi.  OK for trunk? What does full memory barrier here mean? +@table @code +@item void __builtin_ia32_pause (void) +Generates

Re: [patch][simplify-rtx] Fix 16-bit - 64-bit multiply and accumulate

2011-05-25 Thread Andrew Stubbs
On 24/05/11 20:35, Joseph S. Myers wrote: On Tue, 24 May 2011, Andrew Stubbs wrote: I've created this new, simpler patch that converts (extend (mult a b)) into (mult (extend a) (extend b)) regardless of what 'a' and 'b' might be. (These are then simplified and superfluous extends

Re: PATCH: Add pause intrinsic

2011-05-25 Thread H.J. Lu
On Wed, May 25, 2011 at 3:31 AM, Richard Guenther richard.guent...@gmail.com wrote: On Wed, May 25, 2011 at 12:26 PM, Andrew Haley a...@redhat.com wrote: On 05/24/2011 07:28 PM, H.J. Lu wrote: This patch implements pause intrinsic suggested by Andi.  OK for trunk? What does full memory

Re: RFA PR 48770

2011-05-25 Thread Bernd Schmidt
On 05/24/2011 03:34 PM, Jeff Law wrote: This has gone latent on the trunk, but the underlying issue hasn't been resolved. ira.c::update_equiv_regs can create REG_EQUIV notes for equivalences which are local to a block rather than the traditional function-wide equivalences we typically

Re: [PATCH] Fix a typo in i386 host_detect_local_cpu (PR target/49128)

2011-05-25 Thread H.J. Lu
On Wed, May 25, 2011 at 12:15 AM, Jakub Jelinek ja...@redhat.com wrote: Hi! Committed as obvious. 2011-05-25  Jakub Jelinek  ja...@redhat.com        PR target/49128        * config/i386/driver-i386.c (host_detect_local_cpu): Fix a typo. --- gcc/config/i386/driver-i386.c       (revision

Re: [patch][simplify-rtx] Fix 16-bit - 64-bit multiply and accumulate

2011-05-25 Thread Joseph S. Myers
On Wed, 25 May 2011, Andrew Stubbs wrote: I know that, potentially, not all shifted operands are going to be widening multiplies, but I *think* this should be safe because other random shift values are unlikely to match a real widening mult instruction (and if they do then the code would

Re: [ C++ 4.6 Patch] allow uninitialized const or reference members with -fpermissive

2011-05-25 Thread Jason Merrill
OK, thanks. Jason

Re: Prefixes for libgcc symbols (C6X 9.5/11)

2011-05-25 Thread H.J. Lu
On Fri, May 13, 2011 at 9:10 AM, Bernd Schmidt ber...@codesourcery.com wrote: On 05/13/2011 04:26 PM, Joseph S. Myers wrote: On Fri, 13 May 2011, Bernd Schmidt wrote: The following patch adds a target hook and a corresponding LIBGCC2_ macro which control the generation of library function

Re: [patch][simplify-rtx] Fix 16-bit - 64-bit multiply and accumulate

2011-05-25 Thread Andrew Stubbs
On 25/05/11 14:19, Joseph S. Myers wrote: RTL has defined abstract semantics and RTL transformations should be ones that are valid in accordance with those semantics, with proper assertions if there are additional constraints on the input passed to a function. This means actually counting the

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Uros Bizjak
On Tue, May 24, 2011 at 8:28 PM, H.J. Lu hjl.to...@gmail.com wrote: This patch implements pause intrinsic suggested by Andi.  OK for trunk? gcc/ 2011-05-24  H.J. Lu  hongjiu...@intel.com        * config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_PAUSE.        (bdesc_special_args): Add

Re: [ARM] fix C++ EH interoperability

2011-05-25 Thread Nathan Sidwell
On 05/23/11 16:54, Andrew Haley wrote: On 05/23/2011 04:52 PM, Nathan Sidwell wrote: This patch fixes an interoperability issue with code generated by ARM's EABI compiler. This patch results has been tested for arm-linux, and independently tested by ARM with mixed RVCT-generated code

Re: Prefixes for libgcc symbols (C6X 9.5/11)

2011-05-25 Thread Bernd Schmidt
On 05/25/2011 01:37 PM, H.J. Lu wrote: I think it may have caused: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49160 Looks like it. Not quite sure how to fix it yet. Do you know what files such as i386/64/_divtc3.c are trying to achieve? Bernd

Re: [PATCH PR45098, 4/10] Iv init cost.

2011-05-25 Thread Richard Sandiford
Sorry for being so late. I was just curious... Tom de Vries vr...@codesourcery.com writes: The init cost of an iv will in general not be zero. It will be exceptional that the iv register happens to be initialized with the proper value at no cost. In general, there will at the very least be a

Re: C6X port 9/11: Allow defining attributes in terms of another

2011-05-25 Thread Hans-Peter Nilsson
On Wed, 25 May 2011, Bernd Schmidt wrote: I'm not sure where you're looking for added documentation for this patch. I guess no surprise that'd be md.texi node Defining Attributes, or an updated example in node Attr Example since the documentation for default basically just refers to it. Or

Re: [patch][simplify-rtx] Fix 16-bit - 64-bit multiply and accumulate

2011-05-25 Thread Joseph S. Myers
On Wed, 25 May 2011, Andrew Stubbs wrote: On 25/05/11 14:19, Joseph S. Myers wrote: RTL has defined abstract semantics and RTL transformations should be ones that are valid in accordance with those semantics, with proper assertions if there are additional constraints on the input passed to

Re: Prefixes for libgcc symbols (C6X 9.5/11)

2011-05-25 Thread Bernd Schmidt
On 05/25/2011 01:45 PM, H.J. Lu wrote: On Wed, May 25, 2011 at 6:42 AM, Bernd Schmidt ber...@codesourcery.com wrote: On 05/25/2011 01:37 PM, H.J. Lu wrote: I think it may have caused: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49160 Looks like it. Not quite sure how to fix it yet. Do

Re: PATCH: PR target/49142: Invalid 8bit register operand

2011-05-25 Thread Uros Bizjak
On Tue, May 24, 2011 at 5:54 PM, H.J. Lu hongjiu...@intel.com wrote: Hi, We are working on a new optimization, which turns off TARGET_MOVX. GCC generates: movb %ah, %dil But %ah can only be used with %[abcd][hl].  This patch adds QIreg_operand and uses it in

[PATCH PING] unreviewed tree-slimming patches

2011-05-25 Thread Nathan Froyd
These patches: (C, C++, middle-end) [PATCH 14/18] move TS_STATEMENT_LIST to be a substructure of TS_TYPED http://gcc.gnu.org/ml/gcc-patches/2011-03/msg00560.html (C, Java, middle-end) [PATCH 18/18] make TS_BLOCK a substructure of TS_BASE

C++ PATCH to cp_common_init_ts to fix crash in print_node

2011-05-25 Thread Jason Merrill
Trying to print a TYPE_ARGUMENT_PACK in the debugger with debug_tree crashes because print_node assumes that all types have TS_COMMON. Fixed thus. Tested x86_64-pc-linux-gnu, applying to trunk as obvious. commit 7e5c923a908bffb2d8f8404f6cc7fd81a85bf932 Author: Jason Merrill ja...@redhat.com

C++ PATCH for c++/48292 (variadics and member templates)

2011-05-25 Thread Jason Merrill
Several parts of the variadic template code have had trouble dealing with partial instantiation; this is another one. Tested x86_64-pc-linux-gnu, applying to trunk. commit 0bbe297555a3e6585f1668266d965745df352ba4 Author: Jason Merrill ja...@redhat.com Date: Tue May 24 23:20:29 2011 -0400

Re: Fix for libobjc/48177. Can I apply it to 4.6 as well ?

2011-05-25 Thread Nicola Pero
This patch fixes libobjc/48177. I applied it to trunk. I'd like to apply this patch to the 4.6 branch too. Do I need permission from a Release Manager ? They are always welcome to chime in, though, in this case the libobjc maintainer can approve it. Thanks Mike I browsed the

C++ PATCH for c++/45080 (lambda conversion in templates)

2011-05-25 Thread Jason Merrill
The lambda conversion operator isn't added to CLASSTYPE_DECL_LIST, so it got lost on instantiation. But since we cut some corners building it up to reduce runtime overhead, it's easier to just add it again at instantiation time. Tested x86_64-pc-linux-gnu, applying to trunk. commit

C++ PATCH for c++/45418 (list-initialization of member array)

2011-05-25 Thread Jason Merrill
The code in perform_member_init for handling arrays of non-trivial classes needed a tweak to handle list-initialization. Tested x86_64-pc-linux-gnu, applying to trunk. commit ca84b75b33c26be3e9cf2894f4c8b08e3a5cac73 Author: Jason Merrill ja...@redhat.com Date: Wed May 25 00:45:38 2011 -0400

C++ PATCH for c++/48935 (ICE with invalid enum scope)

2011-05-25 Thread Jason Merrill
Checking constructor_name_p doesn't work for an enum, and there's no reason to check it for non-classes anyway. The change to cp_parser_invalid_type_name is to avoid saying that a scoped enum is a class; now it will print the actual tag used in defining the type. Tested x86_64-pc-linux-gnu,

[v3] Use noexcept in thread and mutex

2011-05-25 Thread Paolo Carlini
Hi, tested x86_64-linux, committed to mainline. Thanks, Paolo. 2011-05-25 Paolo Carlini paolo.carl...@oracle.com * include/std/thread: Use noexcept throughout per the FDIS. * include/std/mutex: Likewise. Index: include/std/thread

Re: Cgraph thunk reorg

2011-05-25 Thread David Edelsohn
Honza, After we debugged this offline, I assume that you applied a version of the patch to trunk? Thanks, David On Fri, May 13, 2011 at 3:14 PM, David Edelsohn dje@gmail.com wrote: Honza, Testing is not complete, but testcases that failed with DECL_ONE_ONLY error now are passing with

Re: Fix PR 49014

2011-05-25 Thread Bernd Schmidt
On 05/25/2011 08:21 AM, Andrey Belevantsev wrote: Vlad, Bernd, I wonder if we can avoid having recog_memoized =0 insns that do not have proper DFA reservations (that is, they do not change the DFA state). I see that existing practice allows this as shown by Bernd's patch to 48403, i.e. such

Re: PATCH: PR target/49142: Invalid 8bit register operand

2011-05-25 Thread H.J. Lu
On Wed, May 25, 2011 at 7:00 AM, Uros Bizjak ubiz...@gmail.com wrote: On Tue, May 24, 2011 at 5:54 PM, H.J. Lu hongjiu...@intel.com wrote: Hi, We are working on a new optimization, which turns off TARGET_MOVX. GCC generates: movb %ah, %dil But %ah can only be used with %[abcd][hl].  This

Re: [RFA] [PR44618] [PowerPC] Wrong code for -frename-registers

2011-05-25 Thread David Edelsohn
On Mon, May 23, 2011 at 5:53 PM, edmar ed...@freescale.com wrote: I completed re-testing everything. It turns out I cannot reproduce the original error on gcc-4.4 (rev 173968) So, I am submitting only the patch that I tested for gcc-4.5/4.6/4.7 Regression tested for e500mc target on: 4.5:

Re: PATCH: Add pause intrinsic

2011-05-25 Thread H.J. Lu
On Wed, May 25, 2011 at 7:36 AM, Andrew Haley a...@redhat.com wrote: On 05/25/2011 01:34 PM, H.J. Lu wrote: On Wed, May 25, 2011 at 3:26 AM, Andrew Haley a...@redhat.com wrote: On 05/24/2011 07:28 PM, H.J. Lu wrote: This patch implements pause intrinsic suggested by Andi.  OK for trunk?

[Patch ARM] Actually generate vorn and vbic instructions.

2011-05-25 Thread Ramana Radhakrishnan
Hi, A co-worker pointed out that we weren't generating vorn and vbic instructions for Neon and I had a look. Tests are still running and will commit to trunk if there are no regressions. cheers Ramana 2011-05-25 Ramana Radhakrishnan ramana.radhakrish...@linaro.org *

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Richard Guenther
On Wed, May 25, 2011 at 4:47 PM, H.J. Lu hjl.to...@gmail.com wrote: On Wed, May 25, 2011 at 7:36 AM, Andrew Haley a...@redhat.com wrote: On 05/25/2011 01:34 PM, H.J. Lu wrote: On Wed, May 25, 2011 at 3:26 AM, Andrew Haley a...@redhat.com wrote: On 05/24/2011 07:28 PM, H.J. Lu wrote: This

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Andrew Haley
On 05/25/2011 03:47 PM, H.J. Lu wrote: On Wed, May 25, 2011 at 7:36 AM, Andrew Haley a...@redhat.com wrote: On 05/25/2011 01:34 PM, H.J. Lu wrote: On Wed, May 25, 2011 at 3:26 AM, Andrew Haley a...@redhat.com wrote: On 05/24/2011 07:28 PM, H.J. Lu wrote: This patch implements pause intrinsic

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Richard Guenther
On Wed, May 25, 2011 at 4:54 PM, Andrew Haley a...@redhat.com wrote: On 05/25/2011 03:47 PM, H.J. Lu wrote: On Wed, May 25, 2011 at 7:36 AM, Andrew Haley a...@redhat.com wrote: On 05/25/2011 01:34 PM, H.J. Lu wrote: On Wed, May 25, 2011 at 3:26 AM, Andrew Haley a...@redhat.com wrote: On

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Andrew Haley
On 05/25/2011 03:57 PM, Richard Guenther wrote: asm volatile ( : : : memory) in fact will work as a full memory barrier How? You surely need MFENCE or somesuch, unless all you care about is a compiler barrier. That's what I think needs to be clarified. Andrew.

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Richard Guenther
On Wed, May 25, 2011 at 5:09 PM, Andrew Haley a...@redhat.com wrote: On 05/25/2011 03:57 PM, Richard Guenther wrote: asm volatile ( : : : memory) in fact will work as a full memory barrier How?  You surely need MFENCE or somesuch, unless all you care about is a compiler barrier.  That's what

Re: [testsuite] ignore irrelevant warning in two ARM tests

2011-05-25 Thread Janis Johnson
On 05/24/2011 05:49 PM, Mike Stump wrote: On May 24, 2011, at 3:42 PM, Janis Johnson wrote: Is this one OK for trunk and 4.6? The failure occurs for arm-none-eabi and for arm-none-linux-gnueabi. You should repeat all the original options from the main dg-options line, with -Wno-abi added,

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Michael Matz
Hi, On Wed, 25 May 2011, Richard Guenther wrote: asm volatile ( : : : memory) in fact will work as a full memory barrier How?  You surely need MFENCE or somesuch, unless all you care about is a compiler barrier.  That's what I think needs to be clarified. Well, yes, I'm talking

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Richard Guenther
On Wed, May 25, 2011 at 5:20 PM, Michael Matz m...@suse.de wrote: Hi, On Wed, 25 May 2011, Richard Guenther wrote: asm volatile ( : : : memory) in fact will work as a full memory barrier How?  You surely need MFENCE or somesuch, unless all you care about is a compiler barrier.  

Re: PATCH: PR target/49142: Invalid 8bit register operand

2011-05-25 Thread Uros Bizjak
On Wed, May 25, 2011 at 4:42 PM, H.J. Lu hjl.to...@gmail.com wrote: On Wed, May 25, 2011 at 7:00 AM, Uros Bizjak ubiz...@gmail.com wrote: On Tue, May 24, 2011 at 5:54 PM, H.J. Lu hongjiu...@intel.com wrote: Hi, We are working on a new optimization, which turns off TARGET_MOVX. GCC generates:

Re: [SPARC] Disable -fira-share-save-slots by default

2011-05-25 Thread Jeff Law
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 05/24/11 16:30, Eric Botcazou wrote: The new save slot sharing algorithm has a documented limitation: Future work: In the fallback case we should iterate backwards across all possible modes for the save, choosing the largest

Re: RFA PR 48770

2011-05-25 Thread Jeff Law
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 05/25/11 06:40, Bernd Schmidt wrote: The code in question is literally 20 years old and predates running any real dead code elimination after reload. ISTM the right thing to do is stop using delete_dead_insn in this code and let the

Re: New options to disable/enable any pass for any functions (issue4550056)

2011-05-25 Thread Xinliang David Li
Ping. The link to the message: http://gcc.gnu.org/ml/gcc-patches/2011-05/msg01303.html Thanks, David On Sun, May 22, 2011 at 4:17 PM, Xinliang David Li davi...@google.com wrote: Ping. David On Fri, May 20, 2011 at 9:06 AM, Xinliang David Li davi...@google.com wrote: Ok to check in this

Re: PATCH: PR target/49142: Invalid 8bit register operand

2011-05-25 Thread H.J. Lu
On Wed, May 25, 2011 at 8:30 AM, Uros Bizjak ubiz...@gmail.com wrote: On Wed, May 25, 2011 at 4:42 PM, H.J. Lu hjl.to...@gmail.com wrote: On Wed, May 25, 2011 at 7:00 AM, Uros Bizjak ubiz...@gmail.com wrote: On Tue, May 24, 2011 at 5:54 PM, H.J. Lu hongjiu...@intel.com wrote: Hi, We are

Re: RFA PR 48770

2011-05-25 Thread Jeff Law
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 05/25/11 06:40, Bernd Schmidt wrote: I've looked at code generation; it appears unchanged on i686-linux, which I think is the expected result. There are minor differences in assembly output on mips64-linux. If you want to look at it, I'm

Re: Prefixes for libgcc symbols (C6X 9.5/11)

2011-05-25 Thread H.J. Lu
On Wed, May 25, 2011 at 6:52 AM, Bernd Schmidt ber...@codesourcery.com wrote: On 05/25/2011 01:45 PM, H.J. Lu wrote: On Wed, May 25, 2011 at 6:42 AM, Bernd Schmidt ber...@codesourcery.com wrote: On 05/25/2011 01:37 PM, H.J. Lu wrote: I think it may have caused:

Re: Prefixes for libgcc symbols (C6X 9.5/11)

2011-05-25 Thread Bernd Schmidt
On 05/25/2011 04:38 PM, H.J. Lu wrote: On Wed, May 25, 2011 at 6:52 AM, Bernd Schmidt ber...@codesourcery.com wrote: Anyhow, below is one possible way of fixing it. It fixed the libgcc failure. Can you check it in? I suppose it is reasonably obvious. Done. Bernd

Re: [PATCH PING] unreviewed tree-slimming patches

2011-05-25 Thread Joseph S. Myers
On Wed, 25 May 2011, Nathan Froyd wrote: These patches: (C, C++, middle-end) [PATCH 14/18] move TS_STATEMENT_LIST to be a substructure of TS_TYPED http://gcc.gnu.org/ml/gcc-patches/2011-03/msg00560.html (C, Java, middle-end) [PATCH 18/18] make TS_BLOCK a substructure of

Re: New options to disable/enable any pass for any functions (issue4550056)

2011-05-25 Thread Joseph S. Myers
On Wed, 25 May 2011, Xinliang David Li wrote: Ping. The link to the message: http://gcc.gnu.org/ml/gcc-patches/2011-05/msg01303.html I don't consider this an option handling patch. Patches adding whole new features involving new options should be reviewed by maintainers for the part of

Re: PATCH: Add pause intrinsic

2011-05-25 Thread H.J. Lu
On Wed, May 25, 2011 at 9:43 AM, Andrew Haley a...@redhat.com wrote: On 05/25/2011 04:32 PM, H.J. Lu wrote: On Wed, May 25, 2011 at 8:27 AM, Richard Guenther richard.guent...@gmail.com wrote: On Wed, May 25, 2011 at 5:20 PM, Michael Matz m...@suse.de wrote: Hi, On Wed, 25 May 2011, Richard

[PATCH] Fix VRP switch handling (PR tree-optimization/49161)

2011-05-25 Thread Jakub Jelinek
Hi! The following testcase is miscompiled, because there are multiple CASE_LABELs for the same target bb in a switch: bb 2: switch (x_1(D)) default: L13, case 3: l4, case 4: l1, case 6: l3 l3: bar (-1); l2: l1: l4: bar (0); find_switch_asserts sorts by uids of CASE_LABELs and adds x_1(D)

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Andrew Pinski
On Wed, May 25, 2011 at 10:19 AM, H.J. Lu hjl.to...@gmail.com wrote: -- H.J. --- Index: doc/extend.texi === --- doc/extend.texi     (revision 174216) +++ doc/extend.texi     (working copy) @@ -8699,7 +8699,8 @@ The following

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Andrew Haley
On 05/25/2011 06:26 PM, Andrew Pinski wrote: On Wed, May 25, 2011 at 10:19 AM, H.J. Lu hjl.to...@gmail.com wrote: -- H.J. --- Index: doc/extend.texi === --- doc/extend.texi (revision 174216) +++ doc/extend.texi

Re: More fixes from static analysis checkers

2011-05-25 Thread Jakub Jelinek
On Thu, Mar 24, 2011 at 03:52:57PM -0600, Jeff Law wrote: We had a variety of functions which would fail to call va_end prior to returning. I'm not aware of a host were this could cause a problem, but it's easy enough to fix and keeps the checkers quiet. In case of def_fn_type, this added a

Re: [patch, ARM] Fix PR42017, LR not used in leaf functions

2011-05-25 Thread Chung-Lin Tang
On 2011/5/20 07:46 PM, Chung-Lin Tang wrote: On 2011/5/20 下午 07:41, Ramana Radhakrishnan wrote: On 17/05/11 14:10, Chung-Lin Tang wrote: On 2011/5/13 04:26 PM, Richard Sandiford wrote: Richard Sandifordrichard.sandif...@linaro.org writes: Chung-Lin Tangclt...@codesourcery.com writes: My

Re: Go patch committed: Update to current Go library

2011-05-25 Thread Rainer Orth
Ian Lance Taylor i...@google.com writes: I just committed a patch to godump.c which I think should fix this issue. Let me know if it doesn't. There are several issues now: * While I get // var ___iob [59+1]___FILE now, there's still var __lastbuf *_FILE left, with commented // type

[PATCH] More pow(x,c) expansions in cse_sincos pass (PR46728, patch 3)

2011-05-25 Thread William J. Schmidt
This patch adds logic to gimple_expand_builtin_pow () to optimize pow(x,y), where y is one of 0.5, 0.25, 0.75, 1./3., or 1./6. I noticed that there were two missing calls to gimple_set_location () in my previous patch, so I've corrected those here as well. There's one TODO comment in this patch.

[pph] Reformat (issue4515140)

2011-05-25 Thread Lawrence Crowl
In pph_stream_read_tree and pph_stream_write_tree, reformat for style. This step was skipped in the last patch to make diffs more sensible. Index: gcc/cp/ChangeLog.pph 2011-05-25 Lawrence Crowl cr...@google.com * pph-streamer-in.c (pph_stream_read_tree): Reformat for style. *

[v3] Small tweak to std::random_device

2011-05-25 Thread Paolo Carlini
Hi, committed to mainline. Thanks, Paolo. / 2011-05-25 Paolo Carlini paolo.carl...@oracle.com * include/bits/random.h (random_device::min, max): Specify constexpr. Index: include/bits/random.h ===

Re: [testsuite] remove XFAIL for all but ia64 for g++.dg/tree-ssa/pr43411.C

2011-05-25 Thread Mike Stump
On May 25, 2011, at 1:38 AM, Rainer Orth wrote: Janis Johnson jani...@codesourcery.com writes: Archived test results for 4.7.0 for most processors with C++ results have: XPASS: g++.dg/tree-ssa/pr43411.C scan-tree-dump-not optimized OBJ_TYPE_REF The only failures I could find were for

Re: [PATCH PING] unreviewed tree-slimming patches

2011-05-25 Thread Tom Tromey
Nathan == Nathan Froyd froy...@codesourcery.com writes: Nathan (C, Java, middle-end) Nathan [PATCH 18/18] make TS_BLOCK a substructure of TS_BASE Nathan http://gcc.gnu.org/ml/gcc-patches/2011-03/msg00564.html The Java parts are ok. I think these sorts of changes should be obvious once

Re: [PATCH PING] unreviewed tree-slimming patches

2011-05-25 Thread Nathan Froyd
On 05/25/2011 02:06 PM, Tom Tromey wrote: Nathan == Nathan Froyd froy...@codesourcery.com writes: Nathan (C, Java, middle-end) Nathan [PATCH 18/18] make TS_BLOCK a substructure of TS_BASE Nathan http://gcc.gnu.org/ml/gcc-patches/2011-03/msg00564.html The Java parts are ok. I

Patch for libobjc/38307

2011-05-25 Thread Nicola Pero
I committed to trunk this libobjc patch by Richard Frith-Macdonald and David Ayers. The patch fixes some rare (but serious) problems with +initialize in multithreading programs. It's complicated and I refer to http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38307 for more information. I

[PATCH, rs6000] Tidy up dumping of register/memory move cost

2011-05-25 Thread Pat Haugen
The following fixes a problem when dumping register costs, where the incorrect 'from' value was being written out because the code modified the incoming parameter value. It also changes things so that register/memory costs are only dumped on the outermost call, eliminating intermediate output

Re: PATCH: PR target/49142: Invalid 8bit register operand

2011-05-25 Thread Uros Bizjak
On Wed, May 25, 2011 at 6:20 PM, H.J. Lu hjl.to...@gmail.com wrote: We are working on a new optimization, which turns off TARGET_MOVX. GCC generates: movb %ah, %dil But %ah can only be used with %[abcd][hl].  This patch adds QIreg_operand and uses it in

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Basile Starynkevitch
On Wed, 25 May 2011 11:26:51 +0100 Andrew Haley a...@redhat.com wrote: On 05/24/2011 07:28 PM, H.J. Lu wrote: This patch implements pause intrinsic suggested by Andi. OK for trunk? What does full memory barrier here mean? +@table @code +@item void __builtin_ia32_pause (void)

Re: Create common hooks structure shared between driver and cc1

2011-05-25 Thread Joseph S. Myers
Here is a revised version of my patch http://gcc.gnu.org/ml/gcc-patches/2011-05/msg01779.html to create the common hooks structure. Tested in the same way as the original patch. OK to commit? In the course of working on moving hooks to the new structure, I found that every target architecture

Re: [PATCH][4.6] detect C++ errors to fix 2288 and 18770

2011-05-25 Thread Nathan Froyd
On Sun, May 22, 2011 at 03:25:41PM -0700, H.J. Lu wrote: FWIW, I tried Janis's patch on 4.6 branch and I got /export/gnu/import/git/gcc/gcc/testsuite/g++.dg/parse/pr18770.C: In function 'void e1()':^M /export/gnu/import/git/gcc/gcc/testsuite/g++.dg/parse/pr18770.C:29:11: error:

Re: PATCH: PR target/49142: Invalid 8bit register operand

2011-05-25 Thread H.J. Lu
On Wed, May 25, 2011 at 12:11 PM, Uros Bizjak ubiz...@gmail.com wrote: On Wed, May 25, 2011 at 6:20 PM, H.J. Lu hjl.to...@gmail.com wrote: We are working on a new optimization, which turns off TARGET_MOVX. GCC generates: movb %ah, %dil But %ah can only be used with %[abcd][hl].  This patch

Re: PATCH: Add pause intrinsic

2011-05-25 Thread H.J. Lu
On Wed, May 25, 2011 at 12:17 PM, Basile Starynkevitch bas...@starynkevitch.net wrote: On Wed, 25 May 2011 11:26:51 +0100 Andrew Haley a...@redhat.com wrote: On 05/24/2011 07:28 PM, H.J. Lu wrote: This patch implements pause intrinsic suggested by Andi.  OK for trunk? What does full

C++ PATCH for c++/46696 (error with defaulted op= and arrays)

2011-05-25 Thread Jason Merrill
Another case where we now need to check DECL_DEFAULTED_FN rather than DECL_ARTIFICIAL. Tested x86_64-pc-linux-gnu, applying to trunk. commit 3ac89bd9f5f81b4d3ff293b337e7e9163d3402dd Author: Jason Merrill ja...@redhat.com Date: Wed May 25 12:05:03 2011 -0400 PR c++/46696 * typeck.c

C++ PATCH for c++/47184 (list-initialized temporary in parenthesized initializer)

2011-05-25 Thread Jason Merrill
cp_parser_parameter_declaration is clever enough to tell that when we see Type1 id(Type2 if the next token doesn't indicate a cast, we're dealing with a function declarator. But it was only checking for '('; now it needs to check for '{' as well. After making that fix, I needed to change

C++ PATCHes for c++/46245 and c++/46145 (auto issues)

2011-05-25 Thread Jason Merrill
In 46245, we were complaining too soon about an auto parameter; we need to wait until after we splice in a late-specified return type. In 46145, we were failing to complain about an auto typedef. Tested x86_64-pc-linux-gnu, applying to trunk. commit 0ca632627d749d168b602675ca48df9e88a1eac5

C++ PATCH for c++/45698 (crash with variadics)

2011-05-25 Thread Jason Merrill
45698 was actually fixed in 4.5.0, but before I closed it I checked to see how the testcase was doing with the current compiler, and found that it was crashing again. This turned out to be because of Nathan's recent tree-slimming work; ARGUMENT_PACK_SELECT doesn't have TREE_TYPE, so we crash

[PATCH, testsuite] Additional tests for PR46728 (PR46728 patch 4)

2011-05-25 Thread William J. Schmidt
Since I'm in process of moving the lowering of pow and powi calls from expand into gimple, I wrote some tests to improve coverage in this area. Most of these look for specific code generation patterns in PowerPC assembly where the existence of a hardware floating square root can be guaranteed.

Re: PATCH: Add pause intrinsic

2011-05-25 Thread Basile Starynkevitch
On Wed, 25 May 2011 12:31:17 -0700 H.J. Lu hjl.to...@gmail.com wrote: On Wed, May 25, 2011 at 12:17 PM, Basile Starynkevitch bas...@starynkevitch.net wrote: Perhaps the doc might explain why is it necessary to have a builtin for two independent roles: first, the full compiler memory barrier

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