BTW: Looking a bit more to the spec, we can simply write
xbegin $0
as the spec says that offset is relative to the _NEXT_ instruction
Yes that's true. I'm not sure the .+6 even results in 0. Kirill?
-Andi
--
a...@linux.intel.com -- Speaking for myself only.
On Tue, Feb 21, 2012 at 08:49:13AM +0100, Uros Bizjak wrote:
2012-02-20 Quentin Neill quentin.ne...@amd.com
PR target/52137
* gcc/config/i386/bdver1.md (bdver1_call, bdver1_push,
Please leave out gcc/ prefix from the ChangeLog entry though.
Jakub
On Tue, 21 Feb 2012, Jakub Jelinek wrote:
Hi!
This function spends significant amount of code to update the virtual
uses/defs in the new sequence, but only handles that way stores, not
non-pure/const calls, so we ICE during tree DSE on this testcase, because
vop has been marked for
On Mon, Feb 20, 2012 at 8:55 PM, Tijl Coosemans t...@coosemans.org wrote:
On Monday 9 January 2012 10:05:08 Richard Guenther wrote:
Since GCC 4.4 applying the malloc attribute to realloc-like
functions does not work under the documented constraints because
the contents of the memory pointed to
On Mon, Feb 20, 2012 at 9:59 PM, Richard Henderson r...@redhat.com wrote:
On 02/20/12 12:14, Kai Tietz wrote:
2012-02-20 Kai Tietz kti...@redhat.com
PR libstdc++/52300
* gthr.h (GTHREAD_USE_WEAK): Define as zero for mingw.
Ok.
It looks like this belongs in some
On Mon, Feb 20, 2012 at 11:59 PM, Kai Tietz ktiet...@googlemail.com wrote:
Hi,
this patch replaces use of llx for printf/scanf by inttypes.h
PRIxMAX/SCNxMAX macros. If those macros aren't present it defines
them as default to llx.
Bootstrapped and tested on ... ?
Ok.
Thanks,
Richard.
Hello,
Here is a patch which adds -mandroid option support to x86 target. OK
for google/gcc-4_6_2-mobile branch?
Thanks,
Ilya
--
2012-02-21 Enkovich Ilya ilya.enkov...@intel.com
* config/i386/linux.h (LINUX_TARGET_CC1_SPEC): New.
(CC1_SPEC): Use LINUX_OR_ANDROID_CC.
On 20/02/12 17:51, Bernd Schmidt wrote:
On 02/20/2012 06:39 PM, Richard Earnshaw wrote:
I'm not sure why it should be. Can't a user write
#ifdef __cplusplus
#define BOOL bool
#else
#define bool _Bool
#endif
struct x {
volatile BOOL a : 1;
volatile BOOL b : 1;
volatile unsigned
On Mon, 20 Feb 2012, Jakub Jelinek wrote:
On Mon, Feb 20, 2012 at 04:11:13PM +0100, Richard Guenther wrote:
This fixes PR52298, we need to use the proper DR step for outer
loop vectorization.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
Thanks.
Hello,
Here is a patch which enables stack protector feature for Android
targets. OK for google/gcc-4_6_2-mobile branch?
Thanks,
Ilya
--
2012-02-21 Enkovich Ilya ilya.enkov...@intel.com
* gcc/configure.ac : Enable stack protector for
Android target.
* gcc/configure :
Hello,
Here is a ptch which enables exceptions and RTTI by default for
android targets like it is done in current NDK GCC 4.4.3 compiler. OK
for google/gcc-4_6_2-mobile branch.
Thanks,
Ilya
--
2012-02-21 Enkovich Ilya ilya.enkov...@intel.com
* gcc/config/linux-android.h
Hello,
Here is a patch to enable __ANDROID__ macro on x86 Android targets.
Currently it is enabled for ARM only. OK for google/gcc-4_6_2-mobile
branch?
Thanks
Ilya
--
2012-02-21 Enkovich Ilya ilya.enkov...@intel.com
* gcc/config/i386/linux.h (TARGET_OS_CPP_BUILTINS): Add
2012/2/21 Richard Guenther richard.guent...@gmail.com:
On Mon, Feb 20, 2012 at 11:59 PM, Kai Tietz ktiet...@googlemail.com wrote:
Hi,
this patch replaces use of llx for printf/scanf by inttypes.h
PRIxMAX/SCNxMAX macros. If those macros aren't present it defines
them as default to llx.
Hi,
committed mainline and 4_6-branch.
Thanks,
Paolo.
///
2012-02-21 Paolo Carlini paolo.carl...@oracle.com
PR libstdc++/52317
* python/Makefile.am: Update boilerplate license text to GPLv3.
* include/profile/unordered_map: Likewise.
*
Hi,
the attached patch fixes several dfp testsuite fails with -march=z196
-m31:
Running target unix
FAIL: c-c++-common/dfp/convert-int-max.c -std=gnu++98 (internal compiler error)
FAIL: c-c++-common/dfp/convert-int-max.c -std=gnu++98 (test for excess errors)
WARNING:
This is a tentative patch to the PR. As Jakub explained, GCC does not support
configurations with FP = SP and DSE optimizer generates wrong code for AVR.
This patch implements Jakub's proposal to hack around by hiding the action of
setting/moving between SP and SP into UNSPEC[_VOLATILE]s.
All
On Tue, Feb 21, 2012 at 12:38:48PM +0100, Georg-Johann Lay wrote:
However, if all insns that are involved in SP/FP manipulation get the
RTX_FRAME_RELATED_P, almost every test case that has -g crashes with this
dwarf-ICE.
My suggestion actually wasn't to use unspec for reading from sp, but
http://gcc.gnu.org/viewcvs?view=revisionrevision=184434
testsuite/
PR middle-end/51782
* gcc.target/avr/torture/pr51782-1.c: New test.
Hi guys,
I've played .+6 and it seems to be working, although I'd rather
prefer $0 much better, since it is not deal with insn+ops length.
Will prepare updated patch later today
K
On Tue, Feb 21, 2012 at 12:02 PM, Andi Kleen a...@firstfloor.org wrote:
BTW: Looking a bit more to the spec, we
When PRE inserts stmts it re-gimplifies them. This causes spurious
TREE_ADDRESSABLE bits to be set on decls as the testcase shows.
It's not easy to fix with the recursive nature of the gimplifier,
and generally we cannot rely on the gimplifier predicates to
properly tell us whether we need to do
The gimplifier, when forcing a value to a temporary, uses the
type of the value for that temporary variable, making it for
example volatile or const, or puts it in a different address-space
even. That's odd and not required, we can decay to the main-variant type.
Bootstrapped and tested on
On 21/02/12 05:39, Barracuda wrote:
Hello!
I'm new to GCC internals, but I'm using GCC for couple of years.
Yesterday I found that GCC does not support calling SWI routines from C/C++
code.
For example, in other ARM-targeted compiliers developer can use such syntax
for function prototype:
On Tue, Feb 21, 2012 at 06:11:54PM +0400, Kirill Yukhin wrote:
As far as I undersand, correct one seems like that:
.intel_syntax
xbegin $0
nop
.att_syntax
xbegin ($0)
nop
Which disassembles into:
.text:
0: c7 f8 00 00 00 00
Hi,
with the attached patch -mhard-dfp is used whenever possible. So far
it was disabled by default for -m31 although hardware dfp is available
when also -mzarch is given.
Committed to mainline.
Bye,
-Andreas-
2012-02-21 Andreas Krebbel andreas.kreb...@de.ibm.com
*
On Tuesday 21 February 2012 10:19:15 Richard Guenther wrote:
On Mon, Feb 20, 2012 at 8:55 PM, Tijl Coosemans t...@coosemans.org wrote:
On Monday 9 January 2012 10:05:08 Richard Guenther wrote:
Since GCC 4.4 applying the malloc attribute to realloc-like
functions does not work under the
On 02/21/2012 02:52 AM, Uros Bizjak wrote:
On Tue, Feb 21, 2012 at 12:26 AM, Andi Kleena...@firstfloor.org wrote:
IIUC the documentation, the fallback label is a parameter to xbegin
insn, but the insn itself doesn't jump anywhere - it just records the
From the point of view of the program
On Tue, Feb 21, 2012 at 2:46 AM, Jakub Jelinek ja...@redhat.com wrote:
On Tue, Feb 21, 2012 at 08:49:13AM +0100, Uros Bizjak wrote:
2012-02-20 Quentin Neill quentin.ne...@amd.com
PR target/52137
* gcc/config/i386/bdver1.md (bdver1_call, bdver1_push,
Please leave out gcc/
Yes,
Patrick, you were faster :)
Seems, we just need to pass 0 as IMM value
On Tue, Feb 21, 2012 at 7:14 PM, Patrick Marlier
patrick.marl...@gmail.com wrote:
On 02/21/2012 02:52 AM, Uros Bizjak wrote:
On Tue, Feb 21, 2012 at 12:26 AM, Andi Kleena...@firstfloor.org wrote:
IIUC the
Hi,
using the -fgnu-tm option fails for targets not supporting libitm with
a *link* failure. So the compile test wasn't sufficient.
With the attached patch the following failures disappear on s390 and
s390x:
FAIL: gcc.dg/lto/trans-mem-1 c_lto_trans-mem-1_0.o-c_lto_trans-mem-1_1.o link,
-flto
On 06/02/12 13:13, Andrew Stubbs wrote:
This patch adds DImode shift support in NEON registers/instructions.
The patch causes delays any lowering until the split2 pass, after the
register allocator has chosen whether to do the shift in NEON (VFP)
registers, or in core-registers.
The
On Tue, Feb 21, 2012 at 04:23:16PM +0100, Andreas Krebbel wrote:
using the -fgnu-tm option fails for targets not supporting libitm with
a *link* failure. So the compile test wasn't sufficient.
With the attached patch the following failures disappear on s390 and
s390x:
FAIL:
Andreas Krebbel kreb...@linux.vnet.ibm.com writes:
Ok for mainline?
No, this is wrong. How would gcc be able to find the uninstalled libitm.so
and libitm.spec on targets that do support it?
I'm undecided how (and where) best to fix this. One might either handle
it via something like
PR52294 is a case where we generate a cbz instruction that ends up
trying to reach too far. The reason for this is that we calculate the
size of some instructions as being 2 bytes when in reality they take 4.
The problem in this instance is that a peephole to shorten
lsl reg, reg, reg
into
Build and regtested on x86-64-linux.
OK for the 4.8 trunk?
Tobias
2012-02-21 Tobias Burnus bur...@net-b.de
PR fortran/52325
* primary.c (gfc_match_varspec): Add diagnostic for % with
nonderived types.
2012-02-21 Tobias Burnus bur...@net-b.de
PR fortran/52325
*
By the way, the compile subset of the testsuite works for pdp11; it has some
errors which still need cleanup but a large fraction works.
paul
-Original Message-
From: Steven Bosscher [mailto:stevenb@gmail.com]
Sent: Tuesday, February 14, 2012 5:09 PM
To: Koning, Paul; GCC
The attached patch fixes instruction generation for unsigned vector
comparisons against a known-zero vector.
ARM's Neon extensions only allow unsigned equality comparison against
unsigned zero, not less than or greater than comparisons.
This patch fixes code generation - there are further
The SPARC bootstrap started to fail after recent addition of live range
splitting and trunk merge. The following patch fixes a crash of GCC on
SPARC64 bootstrap. Unfortunately, it is still not enough to fix the
bootstrap failure but I am working on it.
The patch was successfully bootstrapped
2012/2/21 Richard Henderson r...@redhat.com:
On 02/21/12 09:08, Georg-Johann Lay wrote:
PR rtl-optimization/50063
* config/avr/avr.md (movhi_sp_r): Handle -1 (unknown IRQ state)
and 2 (8-bit SP) in operand 2.
* config/avr/avr.c (avr_prologue_setup_frame): Adjust
The latest Crosstool builds reveal one new test failure (and fix several
others). This patch adds the missing failure to x86_64-unknown-linux-gnu.xfail.
2012-02-21 Ollie Wild a...@google.com
* testsuite-management/x86_64-unknown-linux-gnu.xfail: Add
To be integrated to google/main as well.
http://codereview.appspot.com/5687075/
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