Re: [PATCH] Fold VEC_[LR]SHIFT_EXPR (PR tree-optimization/57051)

On Thu, 25 Apr 2013, Jakub Jelinek wrote: Hi! This patch adds folding of constant arguments v and v, which helps to optimize the testcase from the PR back into constant store after vectorized loop is unrolled. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? Ok.

Re: [PATCH] Fix bootstrap with go (uninit warning with ab edges)

On Fri, 26 Apr 2013, Jakub Jelinek wrote: Hi! Bootstrap currently fails in libgo, there are false positive warnings that ({anonymous}) is uninitialized in multiple places. The testcase below reproduces this issue too. The problem is that the ab edges to setjmp call are added

Re: [PATCH] Preserve loops from CFG build until after RTL loop opts

On Thu, 25 Apr 2013, Jakub Jelinek wrote: On Thu, Apr 25, 2013 at 04:19:20PM +0200, Richard Biener wrote: This is the patch that I consider final as a first step (to avoid changing too much at once). I've analyzed the few failures and compared to the previous patch changed the

Re: [C++ Patch] Define __cplusplus == 201300L for -std=c++1y

On 04/24/2013 08:20 PM, Jason Merrill wrote: On 04/24/2013 02:02 PM, Paolo Carlini wrote: +#if __cplusplus 201300L Don't test for this value. Use = 201103L instead. OK with that change. Thanks Jason. Today I'm noticing an issue with the underlying stdio from glibc, which makes our

Re: [C++ Patch] Define __cplusplus == 201300L for -std=c++1y

On Fri, Apr 26, 2013 at 12:32:40PM +0200, Paolo Carlini wrote: On 04/24/2013 08:20 PM, Jason Merrill wrote: On 04/24/2013 02:02 PM, Paolo Carlini wrote: +#if __cplusplus 201300L Don't test for this value. Use = 201103L instead. OK with that change. Thanks Jason. Today I'm noticing

Re: [patch] Hash table changes from cxx-conversion branch - config part

Lawrence, * config/sol2.c'solaris_comdat_htab Fold comdat_hash and comdat_eq into new struct comdat_entry_hasher. [...] Index: gcc/ChangeLog 2013-04-24 Lawrence Crowl cr...@google.com * config/sol2.c (solaris_comdat_htab): Change type to hash_table. Update dependent calls

Re: [C++ Patch] Define __cplusplus == 201300L for -std=c++1y

Hi, On 04/26/2013 12:42 PM, Jakub Jelinek wrote: On Fri, Apr 26, 2013 at 12:32:40PM +0200, Paolo Carlini wrote: On 04/24/2013 08:20 PM, Jason Merrill wrote: On 04/24/2013 02:02 PM, Paolo Carlini wrote: +#if __cplusplus 201300L Don't test for this value. Use = 201103L instead. OK with

Re: [C++ Patch] Define __cplusplus == 201300L for -std=c++1y

2013/4/26 Paolo Carlini paolo.carl...@oracle.com: Hi, On 04/26/2013 12:42 PM, Jakub Jelinek wrote: On Fri, Apr 26, 2013 at 12:32:40PM +0200, Paolo Carlini wrote: On 04/24/2013 08:20 PM, Jason Merrill wrote: On 04/24/2013 02:02 PM, Paolo Carlini wrote: +#if __cplusplus 201300L Don't

Re: [C++ Patch] Define __cplusplus == 201300L for -std=c++1y

2013/4/26 Daniel Krügler daniel.krueg...@gmail.com: 2013/4/26 Paolo Carlini paolo.carl...@oracle.com: Hi, On 04/26/2013 12:42 PM, Jakub Jelinek wrote: On Fri, Apr 26, 2013 at 12:32:40PM +0200, Paolo Carlini wrote: On 04/24/2013 08:20 PM, Jason Merrill wrote: On 04/24/2013 02:02 PM, Paolo

Re: [C++ Patch] Define __cplusplus == 201300L for -std=c++1y

Hi, On 04/26/2013 12:57 PM, Daniel Krügler wrote: Jonathan recently submitted an LWG issue for this (not yet part of the available list). I'm in the process to add the new issue within the following days. He's essentially suggesting to remove get() from C++14. Thanks Daniel. Then, it seems

Re: [C++ Patch] Define __cplusplus == 201300L for -std=c++1y

2013/4/26 Paolo Carlini paolo.carl...@oracle.com: Hi, On 04/26/2013 12:57 PM, Daniel Krügler wrote: Jonathan recently submitted an LWG issue for this (not yet part of the available list). I'm in the process to add the new issue within the following days. He's essentially suggesting to

Re: [C++ Patch] Define __cplusplus == 201300L for -std=c++1y

On 04/26/2013 01:02 PM, Daniel Krügler wrote: I have no number yet, because there are several issues in the pipeline. I'll send it to you once I have it. Ok, thanks! Paolo.

Re: vtables patch 1/3: allow empty array initializations

On 04/24/2013 09:14 PM, DJ Delorie wrote: 24 bits stored as three bytes, or four? How does this affect vtable layout? I would have expected the C++ frontend and libsupc++ to currently be inconsistent with each other given such a setup. In memory, four, I think. The address registers really

Re: [C++ Patch] Define __cplusplus == 201300L for -std=c++1y

2013/4/26 Daniel Krügler daniel.krueg...@gmail.com: 2013/4/26 Daniel Krügler daniel.krueg...@gmail.com: 2013/4/26 Paolo Carlini paolo.carl...@oracle.com: Hi, On 04/26/2013 12:42 PM, Jakub Jelinek wrote: On Fri, Apr 26, 2013 at 12:32:40PM +0200, Paolo Carlini wrote: On 04/24/2013 08:20 PM,

[PATCH] Stream loops with LTO

This adds loop tree streaming to LTO. LTO bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2013-04-26 Richard Biener rguent...@suse.de * Makefile.in (lto-streamer-in.o): Add $(CFGLOOP_H) dependency. (lto-streamer-out.o): Likewise. * cfgloop.c

[PATCH, ARM] Remove incscc and decscc patterns from thumb2.md

This patch removes dead patterns for incscc and decscc from thumb2.md. It's a cleanup after this patch: http://gcc.gnu.org/ml/gcc-patches/2013-01/msg00955.html which removed incscc and decscc expanders and the corresponding patterns from arm.md, but not from thumb2.md. No regression on qemu for

Re: [PATCH] Fix linking with -findirect-dispatch

Am 16.04.2013 11:55, schrieb Matthias Klose: Am 16.04.2013 11:48, schrieb Jakub Jelinek: On Tue, Apr 16, 2013 at 11:37:07AM +0200, Andreas Schwab wrote: Jakub Jelinek ja...@redhat.com writes: at dynamic link time it is a dummy library with no symbols that just adds DT_NEEDED of the latest

Re: [PATCH] Fix linking with -findirect-dispatch

On 04/26/2013 12:22 PM, Matthias Klose wrote: I do see this now too, however the root of the problem seems to be a linker which defaults to --as-needed (which is the case on SuSe afaik). Is this a non-standard thing? So SuSe has a special --configure option which does this? We can always

Re: [PATCH] Loop distribution improvements

ping http://gcc.gnu.org/ml/gcc-patches/2013-04/msg00336.html On Fri, 5 Apr 2013, Marc Glisse wrote: On Fri, 5 Apr 2013, Marc Glisse wrote: Shouldn't we change integer_all_onesp to do what its name says and create a separate integer_minus_onep for the single place I could find where it

[PATCH] Properly outline loop tree in move_sese_region_to_fn

This implements the missing outlining of loop tree parts in move_sese_region_to_fn (used by OMP lowering and thus autopar). Testing coverage is somewhat weak because OMP lowering doesn't update the loop tree when building loops. Something to be fixed so the loop fixup can be avoided.

[C++ testcase, committed] PR 55708

Hi, tested x86_64-linux, committed to mainline. Thanks, Paolo. // 2013-04-26 Paolo Carlini paolo.carl...@oracle.com PR c++/55708 * g++.dg/cpp0x/constexpr-55708.C: New. Index: g++.dg/cpp0x/constexpr-55708.C

[PATCH] Fix PR57081

This should fix PR57081 - the problem is that number-of-iteration estimates are not freed by DCE and thus possibly dead stmts are looked at in loop prediction. The fix is to always free number-of-iteration estimates at loop_optimizer_finalize time (this is the behavior from before preserving

Re: Logic operators ! || for vectors

Ping http://gcc.gnu.org/ml/gcc-patches/2013-04/msg00783.html Even if we decide not to implement logic operators in the front-end, we still need the fix for the wrong code (the 2 save_expr in cp_build_binary_op, is that part of the patch ok with the vector-scalar-2.c testcase? and for 4.8?)

Re: [C++ Patch] Define __cplusplus == 201300L for -std=c++1y

On 26 April 2013 12:06, Daniel Krügler wrote: Jonathan recently submitted an LWG issue for this (not yet part of the available list). I'm in the process to add the new issue within the following days. He's essentially suggesting to remove get() from C++14. To clarify this: The C++ Standard

[AArch64] Map frint intrinsics to standard pattern names directly.

Hi, This patch maps the frint style intrinsics directly to their standard pattern name versions and adds support for frintn, which does not map to a standard pattern name. Regression tested on aarch64-none-elf with no issues. Thanks, James --- gcc/ 2013-04-26 James Greenhalgh

[AArch64] Convert NEON frint implementations to use builtins.

Hi, This patch renames the vrnda, i, m, n, p, xq intrinsics, which previously were vrndqa, i, m, n, p, x At the same time, we move these intrinsics to an RTL-based intrinsic. Regression tested on aarch64-none-elf with no issues. Thanks, James --- gcc/ 2013-04-26 James Greenhalgh

Re: [C++ Patch] Define __cplusplus == 201300L for -std=c++1y

2013/4/26 Jonathan Wakely jwakely@gmail.com: On 26 April 2013 12:06, Daniel Krügler wrote: Jonathan recently submitted an LWG issue for this (not yet part of the available list). I'm in the process to add the new issue within the following days. He's essentially suggesting to remove get()

[PATCH, AArch64] Testcases for ANDS instruction

I made some testcases to go with my implementation of ANDS in the backend, but Naveen Hurugalawadi got the ANDS patterns in before me! I'm now just left with the testcases, but they are still worth adding, so here they are. Tests are working correctly as of current trunk. OK to commit?

[AArch64] Fix order of modes to lroundmn2 standard names.

Hi, The vector versions of lroundmn2, lfloormn2, lceilmn2 convert from mode m to mode n. The current implementation has this backwards. For correctness, this patch swaps the n and m parameters. There is no need to backport this patch as a bug fix, as nothing uses this name for expansion in 4.8.

[AArch64] Map fcvt intrinsics to builtin name directly.

Hi, This patch uses the new builtin-mapping infrastructure to map the fcvt family of builtins directly to their GCC standard pattern name. Regression tested on aarch64-none-elf with no regressions. Thanks, James --- gcc/ 2013-04-26 James Greenhalgh james.greenha...@arm.com *

Re: [AArch64] Fix order of modes to lroundmn2 standard names.

On 26/04/13 14:09, James Greenhalgh wrote: Hi, The vector versions of lroundmn2, lfloormn2, lceilmn2 convert from mode m to mode n. The current implementation has this backwards. For correctness, this patch swaps the n and m parameters. There is no need to backport this patch as a bug fix, as

Re: [PATCH, ARM] Remove incscc and decscc patterns from thumb2.md

On 26/04/13 12:13, Greta Yorsh wrote: This patch removes dead patterns for incscc and decscc from thumb2.md. It's a cleanup after this patch: http://gcc.gnu.org/ml/gcc-patches/2013-01/msg00955.html which removed incscc and decscc expanders and the corresponding patterns from arm.md, but not

[AArch64] Add vector int to float conversions.

Hi, This patch wires up builtins for int to float conversions in Tree, and uint to float conversions in RTL. Regression tested for aarch64-none-elf with no regressions. Thanks, James --- gcc/ 2013-04-26 James Greenhalgh james.greenha...@arm.com * config/aarch64/aarch64-builtins.c

[PATCH, AArch64] Support BICS instruction in the backend

With these patterns, we can now generate BICS in the appropriate places. I've included test cases. This has been run on linux and bare-metal regression tests. OK to commit? Cheers, Ian 2013-04-26 Ian Bolton ian.bol...@arm.com gcc/ * config/aarch64/aarch64.md

[AArch64] Implement vector float-double widening and double-float narrowing.

Hi, gcc.dg/vect/vect-float-truncate-1.c and gcc.dg/vect/vect-float-extend-1.c Were failing because widening and narrowing of floats to doubles was not wired up. This patch fixes that by implementing the standard names: vec_pack_trunc_v2df Taking two vectors of V2DFmode and returning one

Re: [PATCH, AArch64] Testcases for ANDS instruction

On 26/04/13 13:54, Ian Bolton wrote: I made some testcases to go with my implementation of ANDS in the backend, but Naveen Hurugalawadi got the ANDS patterns in before me! I'm now just left with the testcases, but they are still worth adding, so here they are. Tests are working correctly as of

[AArch64] Vectorize over more math.h functions.

Hi, This patch adds float - int builtins to the set of builtins we can try to vectorize in aarch64_builtin_vectorized_function. In particular, we add BUILT_IN_IFLOORF, BUILT_IN_ICEILF, BUILT_IN_LROUND, BUILT_IN_IROUNDF. The BUILT_IN_LROUND cases won't be triggered unless -ffast-math or

[AArch64] Add vector fix, fixuns, fix_trunc, fixuns_trunc standard patterns

Hi, This patch enables vectorization over conversions by implimenting the fix, fixuns, fix_trunc, fixuns_trunc, and ftrunc standard pattern names. Each of these is implimented by the frintzu,s instruction. (Round towards 0) The expanders for these are blank as they are already implimented by

Re: [C++ Patch] Define __cplusplus == 201300L for -std=c++1y

On Fri, Apr 26, 2013 at 7:41 AM, Jonathan Wakely jwakely@gmail.com wrote: But that probably can't be handled with a DR and so is too late for C++14. BSI still gets to submit a NB comment demanding its removal. -- Gaby

[AArch64] fcvt instructions - arm_neon.h changes.

This patch updates the implimentation in arm_neon.h of the vcvt intrinsics. Where appropriate we use C statements, and where not possible we fall back to builtins. There were a number of errors with names and types in the current revision of the file. These have been corrected. Regression

Re: [AArch64] Map frint intrinsics to standard pattern names directly.

On 26 April 2013 13:42, James Greenhalgh james.greenha...@arm.com wrote: Hi, This patch maps the frint style intrinsics directly to their standard pattern name versions and adds support for frintn, which does not map to a standard pattern name. Regression tested on aarch64-none-elf with no

Re: [AArch64] Convert NEON frint implementations to use builtins.

On 26 April 2013 13:45, James Greenhalgh james.greenha...@arm.com wrote: Hi, This patch renames the vrnda, i, m, n, p, xq intrinsics, which previously were vrndqa, i, m, n, p, x At the same time, we move these intrinsics to an RTL-based intrinsic. Regression tested on aarch64-none-elf

[AArch64][Testsuite] Enable vect_uintfloat_cvt for AArch64.

Hi, While modifying all the vcvt builtins we've fixed enough bugs that we can now enable vect_uintfloat_cvt for AArch64. Do that. Patch tested to ensure all newly enabled tests succeed. James --- gcc/testsuite/ 2013-04-26 James Greenhalgh james.greenha...@arm.com *

Re: [PATCH, AArch64] Support BICS instruction in the backend

+ /* { dg-final { scan-assembler bics\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+ } } */ + /* { dg-final { scan-assembler bics\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, lsl 3 } } */ Ian, These two patterns have the same issue Richard just highlighted on your other patch, ie the first pattern will also match

[PATCH, AArch64] Support LDR/STR to/from S and D registers

This patch allows us to load to and store from the S and D registers, which helps with doing scalar operations in those registers. This has been regression tested on bare-metal and linux. OK for trunk? Cheers, Ian 2013-04-26 Ian Bolton ian.bol...@arm.com * config/aarch64/aarch64.md

Make m32c build, fix PSImode truncation

This patch here: http://gcc.gnu.org/ml/gcc-patches/2012-10/msg00661.html changed simplification code from case TRUNCATE: - /* We can't handle truncation to a partial integer mode here - because we don't know the real bitsize of the partial - integer mode. */ - if

Re: [PATCH] Preserve loops from CFG build until after RTL loop opts

On 25/04/13 16:19, Richard Biener wrote: SNIP and compared to the previous patch changed the tree-ssa-tailmerge.c part to deal with merging of loop latch and loop preheader (even if that's a really bad idea) to not regress gcc.dg/pr50763.c. Any suggestion on how to improve that part welcome.

[PATCH] Allow nested use of attributes in MD-files

Hi, This patch allows to use attributes inside other attributes in MD-files. Currently we can't have an attribute depending on both mode and code - we have only mode attribute and code attribute and mode_attribute can't depend on the code. So, if we write, for example, (define_mode_attr

Re: RFA: enable LRA for rs6000

Vlad, in going through the LRA test differences, some of the bswap64 tests are failing because LRA converts the swaps for register/register converts into store/load. For example, if gcc.target/powerpc/bswap64-4.c is compiled on 32-bit, for this function: long long swap_reg (long long a) { return

[PATCH] Two -mxop wrong-code fixes (PR target/56866)

Hi! This patch fixes two wrong-code bugs with -mxop. One is that vpmacsdqh instruction can be only used for vec_widen_smult_odd_v4si but not vec_widen_umult_odd_v4si. Consider we have unsigned V4SImode h* with arguments { 3, 3, 3, 3 } h* { 0xaaab, 0xaaab, 0xaaab, 0xaaab } (but

Re: [build, driver] RFC: Support compressed debug sections

On Thu, 11 Apr 2013, Rainer Orth wrote: +gz= +Common Driver JoinedOrMissing +-gz=format Generate compressed debug sections in format format Although handled entirely in specs, I think it's best to use the Enum .opt facility to list the valid arguments to this option, so the option handling

Re: [PATCH 4/6] Handwritten part of conversion of passes to instances of C++ classes

On Fri, 2013-04-19 at 21:23 -0400, David Malcolm wrote: This is the hand-written part of the patch; it is required for the preceding auto-generated patch to make sense. [Answering my own patch] This patch isn't yet good enough as-is: upon investigating test case failures I found

Patch ping - Add a new option -fstack-protector-strong

Hi, I'd like to ping the patch '-fstack-protector-strong': - http://gcc.gnu.org/ml/gcc-patches/2013-04/msg00945.html Add a new option '-fstack-protector-strong' to protect only stack-smashing-vulnerable functions. Thanks, H.

[C++ Patch/RFC] PR 56450

Hi, in this ICE on valid, finish_decltype_type doesn't handle a COMPOUND_EXPR when the second argument, id_expression_or_member_access_p, is true. As analyzed by Jakub in the audit trail, at parsing time for the test involving: struct A3 { static const int dummy = 0; }; the *.dummy in

Re: RFA: enable LRA for rs6000 [32-bit fortran]

In addition to all of the failures in the 32-bit gfortrain suite, I ran one run of the 32-bit spec 2006 fortan tests, and the following benchmarks fail: 410.bwaves 416.gamess 434.zeusmp 437.leslie3d454.calculix459.GemsFDTD 465.tonto 481.wrf The

patch for recent LRA changes -- another try

I'll already submitted analogous patch a few days ago. Unfortunately, it resulted in some libstdc++ test failures. This version of patch fixes the problem which was a wrong choice of insn alternatives resulted in using MMX regs. The patch was successfully bootstrapped on x86/x86-64.

[PATCH] Fix PR57077 (issue8840045)

This patch fixes PR57077. Certain new uses of apply_probability are actually scaling the counts up, and the scale factor should not be treated as a probability as the value may exceed REG_BR_PROB_BASE. One example (from the PR) is when scaling counts up in LTO when merging profiles. Another

[RFA][PATCH] Eliminate more unnecessary type conversions

So looking at more dumps made it pretty obvious that my previous patch to tree-vrp.c to eliminate useless casts to boolean types which fed into comparisons could and should be generalized. Given: x1 = (T1) x0; if (x1 COND CONST) If the known value range for x0 fits into T1, then we can

[PATCH] Fix VRP LSHIFT_EXPR non-singleton shift count handling (PR tree-optimization/57083)

Hi! If shift count range is [0, 1], then for unsigned LSHIFT_EXPR bound is the topmost bit, but as llshift method always sign-extends the result into double_int, the test don't properly find out that deriving the value range is unsafe. In this case vr0 is [0x7fff8001, 0x8001], thus when

[PATCH] Improve vec_widen_?mult_odd_*

Hi! On #define N 4096 unsigned int b[N], d[N]; void foo (void) { int i; for (i = 0; i N; i++) d[i] = b[i] / 3; } testcase I was looking earlier today because of the XOP issues, I've noticed we generate unnecessary code: vmovdqa .LC0(%rip), %ymm2 ... vpsrlq $32, %ymm2,

[PATCH] Fix a -Wsign-compare warning in i386.c

Hi! GCC 4.7.2 warns about -Wsign-compare when unsigned iterator is compared with cregs_size. GCC 4.8 doesn't warn about it (otherwise bootstrap would fail), because it calls maybe_constant_value before emitting the warning, but still I'd say it is better to use the same signedness.

Re: [patch, mips] Fix for PR target/56942

On Wed, 2013-04-24 at 07:45 +0100, Richard Sandiford wrote: Steve Ellcey sell...@imgtec.com writes: 2013-04-19 Andrew Bennett andrew.benn...@imgtec.com Steve Ellcey sell...@imgtec.com PR target/56942 * config/mips/mips.md (casesi_internal_mips16_mode): Use

Re: RFA: enable LRA for rs6000

On 13-04-26 11:30 AM, Michael Meissner wrote: Vlad, in going through the LRA test differences, some of the bswap64 tests are failing because LRA converts the swaps for register/register converts into store/load. For example, if gcc.target/powerpc/bswap64-4.c is compiled on 32-bit, for this

Re: RFA: enable LRA for rs6000 [32-bit fortran]

On 13-04-26 2:04 PM, Michael Meissner wrote: In addition to all of the failures in the 32-bit gfortrain suite, I ran one run of the 32-bit spec 2006 fortan tests, and the following benchmarks fail: 410.bwaves 416.gamess 434.zeusmp 437.leslie3d454.calculix

Re: RFA: enable LRA for rs6000

On Fri, Apr 26, 2013 at 07:00:37PM -0400, Vladimir Makarov wrote: 2013-04-26 Vladimir Makarov vmaka...@redhat.com * lra.c (setup_operand_alternative): Ignore '?'. * lra-constraints.c (process_alt_operands): Print cost dump for alternatives. Check only moves for

RE: [gomp4] Some progress on #pragma omp simd

Hello Aldy and Jakub, Please see my response below. Thanks, Balaji V. Iyer. -Original Message- From: Aldy Hernandez [mailto:al...@redhat.com] Sent: Wednesday, April 24, 2013 7:22 PM To: Jakub Jelinek Cc: Iyer, Balaji V; Richard Henderson; gcc-patches@gcc.gnu.org Subject:

Re: [C++ Patch/RFC] PR 56450

Why should id_expression_or_member_access_p be false? declvalT().dummy is a class member access (5.2.5) regardless of what kind of member dummy is. Jason

Backport r185150 to google-4_7 and google-4_8(save --std flag as cl_args)

Bootstrapped and passed regression tests. Okay for google-4_7 and google-4_7 branches? Thanks, Dehao 2012-03-09 Rong Xu x...@google.com * opts-global.c (lipo_save_cl_args): save -std option. Google ref b/6117980. Index: gcc/opts-global.c

Re: Backport r185150 to google-4_7 and google-4_8(save --std flag as cl_args)

Ok. David On Fri, Apr 26, 2013 at 6:42 PM, Dehao Chen de...@google.com wrote: Bootstrapped and passed regression tests. Okay for google-4_7 and google-4_7 branches? Thanks, Dehao 2012-03-09 Rong Xu x...@google.com * opts-global.c (lipo_save_cl_args): save -std option.

[GOOGLE] Disallow importing modules with different --std

This patch forbids modules to be imported as aux module if its --std is different with the primary module. Bootstrapped and passed regression test. OK for google branches? Thanks, Dehao Index: gcc/coverage.c === --- gcc/coverage.c

Re: [GOOGLE] Disallow importing modules with different --std

ok with benchmark testing. Need to be in all google branches (47, 48 and main) David On Fri, Apr 26, 2013 at 7:57 PM, Dehao Chen de...@google.com wrote: This patch forbids modules to be imported as aux module if its --std is different with the primary module. Bootstrapped and passed

[wwwdocs] C++14 support for binary literals says Noinstead of Yes

In htdocs/projects/cxx1y.html it says no for support of binary literals. I think that's a Yes actually. Here is a little patchlet. Am I missing something? Index: htdocs/projects/cxx1y.html === RCS file: