Committed revision 214211.
Hello,
here is a new version of the patch which passed bootstrap+testsuite. I am
still removing the ref_maybe_used_by_stmt_p test, see the previous message
for a discussion.
2014-08-20 Marc Glisse marc.gli...@inria.fr
PR tree-optimization/62112
gcc/
* gimple-iterator.c
On Aug 19, 2014, at 2:38 PM, Steve Ellcey sell...@mips.com wrote:
I was pinged about the lack of documentation for the
check_effective_target_non_strict_align procedure I added
to target-supports.exp. This patch fixes that.
Ok.
Hello Uroš
On 18 Aug 21:05, Uros Bizjak wrote:
BTW: Taking these new findings into account, is it possible to split
V_AVX512VL mode iterator in the same way to avoid compound conditions
in the mode iterator?
I've refactored this iterator and fixed trunk. I've also updated all
future changes
Committed.
Also makes visible a desirable change I plan for if-exprs. They
should behave like outer ifs and allow us to write that series
of pattern as
(for op in eq ne
/* Simplify X * C1 CMP 0 to X CMP 0 if C1 is not zero. */
(simplify
(op (mult @0 INTEGER_CST@1) integer_zerop@2)
On Wed, Aug 20, 2014 at 9:45 AM, Kirill Yukhin kirill.yuk...@gmail.com wrote:
Hello Uroš
On 18 Aug 21:05, Uros Bizjak wrote:
BTW: Taking these new findings into account, is it possible to split
V_AVX512VL mode iterator in the same way to avoid compound conditions
in the mode iterator?
I've
Hello Manuel,
Manuel López-Ibáñez lopeziba...@gmail.com writes:
Hi,
This patch is relative to this one here:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01652.html
It implements the Fortran style of prefix and caret line in the
gfc_diagnostic_starter by using the common pretty-printer.
Sorry for the late response. I spent some time trying to understand
your concerns here, but I'm not sure I got what you are saying:
1) Did you assume this patch would somehow disable these formats during
cross builds, preventing the i386-arm xgcc from correctly using them?
I don't believe
On Wed, 20 Aug 2014, Richard Biener wrote:
Committed.
Also makes visible a desirable change I plan for if-exprs. They
should behave like outer ifs and allow us to write that series
of pattern as
(for op in eq ne
/* Simplify X * C1 CMP 0 to X CMP 0 if C1 is not zero. */
(simplify
(op
David Malcolm dmalc...@redhat.com writes:
@@ -4083,7 +4083,7 @@ cfg_layout_can_duplicate_bb_p (const_basic_block bb)
return true;
}
-rtx
+rtx_insn *
duplicate_insn_chain (rtx from, rtx to)
{
rtx insn, next, copy;
@@ -4169,7 +4169,7 @@ duplicate_insn_chain (rtx from, rtx to)
Ping?
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme
Sent: Thursday, August 07, 2014 1:57 PM
To: gcc-patches@gcc.gnu.org
Subject: RE: [PATCH] Fix confusion between target, host and symbolic
for *a function with frame size = 512 and there is outgoing area*,
aarch64 gcc is generate wrong .cfi_def_cfa_offset for the last
stack adjustment instruction in epiloue.
given a simple testcase
test.c
===
int
main (int argc, char **argv)
{
char a[600];
int b = 0x10;
printf (%d, %d, %d,
On Tue, Aug 19, 2014 at 7:52 PM, Mark Wielaard m...@redhat.com wrote:
On Tue, 2014-08-19 at 14:16 +0200, Richard Biener wrote:
On Tue, Aug 19, 2014 at 2:10 PM, Mark Wielaard m...@redhat.com wrote:
gcc/testsuite/ChangeLog
2014-08-19 Mark Wielaard m...@redhat.com
*
On Wed, 20 Aug 2014, Marc Glisse wrote:
On Wed, 20 Aug 2014, Richard Biener wrote:
Committed.
Also makes visible a desirable change I plan for if-exprs. They
should behave like outer ifs and allow us to write that series
of pattern as
(for op in eq ne
/* Simplify X * C1 CMP
Bootstrapped / tested on x86_64-unknown-linux-gnu, applied.
Richard.
2014-08-20 Richard Biener rguent...@suse.de
* gimple-fold.c (fold_stmt_1): Use gsi_replace_with_seq_vops
helper to insert gimple_simplify result.
Index: gcc/gimple-fold.c
Hi,
This version make sure that the added test case pass the test.
* tree-inline.c (setup_one_parameter): Add strict aliasing check.
* c-family/c-common.c (strict_aliasing_warning): Move to alias.c.
* c-family/c-common.h (strict_aliasing_warning): Move to tree.h.
*
Hi,
Presently the decision as to whether to completely scalarize an aggregate
or not is made based on MOVE_RATIO. This is an undocumented, and unexpected,
overloading of the target macro.
In this patch we fix this.
First, we we add a new target hook
TARGET_DEFAULT_MAX_TOTAL_SCALARIZATION_SIZE,
Hi,
This patch wires up our new target hook for AArch64. This means we can
bring back the two failing SRA tests (churn :( ). For now, I've just used
the old values we had for MOVE_RATIO. We should refactor that, as we use it
in two places (more churn :( ).
Bootstrapped on AArch64 with no issues
This patch just replaces the varargs with a builtin_simd_arg*. The use of
varargs seems to make stepping into, and breakpointing, aarch64_simd_expand_args
difficult, and this adds typesafety and (I argue!) reduces complexity.
Tested check-gcc on aarch64-none-elf.
gcc/ChangeLog:
*
On Wed, Aug 20, 2014 at 11:09 AM, James Greenhalgh
james.greenha...@arm.com wrote:
Hi,
Presently the decision as to whether to completely scalarize an aggregate
or not is made based on MOVE_RATIO. This is an undocumented, and unexpected,
overloading of the target macro.
In this patch we
The SIMD-register variant is miscategorized as alu_reg despite not using any
ALU registers, and should be neon_add for e.g. scheduling.
Tested with check-gcc and check-g++ on aarch64-none-elf and aarch64_be-none-elf.
gcc/ChangeLog:
* config/aarch64/aarch64.md (adddi3_aarch64): set
The only reference is in a comment.
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
Remove qualifier_const_pointer, update comment.diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index
On Wed, 20 Aug 2014, Richard Biener wrote:
On Wed, 20 Aug 2014, Marc Glisse wrote:
On Wed, 20 Aug 2014, Richard Biener wrote:
Committed.
Also makes visible a desirable change I plan for if-exprs. They
should behave like outer ifs and allow us to write that series
of pattern as
(for op in
Hello Manuel,
Manuel López-Ibáñez lopeziba...@gmail.com writes:
The idea is that when we see a change of classification, and the
option was originally unspecified, we record the command-line status.
This way, when doing pop later, we already check if the option was
reclassified so we get the
Thanks to Arnaud for confirming that Adacore does not have interest in the
Ada/Alpha combination
(https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01832.html).
As per below, I've tested check-ada on x86_64-none-linux-gnu without problems.
Can I say, ping? :)
Cheers, Alan
Alan Lawrence wrote:
On Wed, 2014-08-20 at 10:20 +0200, Andreas Schwab wrote:
David Malcolm dmalc...@redhat.com writes:
@@ -4083,7 +4083,7 @@ cfg_layout_can_duplicate_bb_p (const_basic_block bb)
return true;
}
-rtx
+rtx_insn *
duplicate_insn_chain (rtx from, rtx to)
{
rtx insn, next,
Hi there,
It's a very simple test case modification to fix the test case failure on ARM
bare metal target.
thread_local6.C is a test case to test the behavior of the deconstruct of a
thread local variable, and it just
use _exit(0) to override the return 1(calling exit(1)). However, such a
Hi,
And I have run test like this:
make check-g++ RUNTESTFLAGS=dg.exp
And turned out there are 3 more unexpected failures like
g++.dg/opt/pmf1.C
/home/linzj/src/build-gcc/gcc-trunk/gcc/testsuite/g++.dg/opt/pmf1.C: In
function ‘int main()’:
The C frontend commonizes uint{16,32,64}_type_node with existing
integer type nodes and thus gets proper names for them. The
LTO frontend (and tree.c common code) keeps them separate
and thus debugs as __unknown__. The following patch arranges
the common code in build_common_tree_nodes to use
This refactors GIMPLE code-gen to use switch ()es similar to
the GENERIC version. This should provide all of the
backtracking avoidance we need (I think so at least).
Bootstrap and regtest ongoing on x86_64-unknown-linux-gnu.
Richard.
2014-08-20 Richard Biener rguent...@suse.de
*
Hi Carrot,
cc'ing the aarch64 maintainers...
On 20/08/14 00:43, Carrot Wei wrote:
Hi
Current AArch64 backend can generate rtl expressions like
(vec_duplicate:DI (const_int 0 [0])), which causes ICE in
simplify_const_unary_operation because vec_duplicate should generate
vector mode only.
As
On Wed, 20 Aug 2014, David Wohlferd wrote:
Or have I completely missed your point?
Suppose you build a copy of GCC, call it GCCA, and use it to compile a
program P, with -Wformat enabled. The following must hold:
* If P is not GCC, asm_fprintf formats are not accepted at all by GCCA
when
On Wed, 2014-08-20 at 10:49 +0200, Richard Biener wrote:
On Tue, Aug 19, 2014 at 7:52 PM, Mark Wielaard m...@redhat.com wrote:
Filed as https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62190 LTO DWARF
produces __unknown__ type for unsigned int function argument type.
I included a smaller
On Wed, Aug 20, 2014 at 2:19 PM, Mark Wielaard m...@redhat.com wrote:
On Wed, 2014-08-20 at 10:49 +0200, Richard Biener wrote:
On Tue, Aug 19, 2014 at 7:52 PM, Mark Wielaard m...@redhat.com wrote:
Filed as https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62190 LTO DWARF
produces __unknown__ type
This changes inner ifs to have a result operand and to allow
a simplify pattern to have multiple such ifs, thus:
(simplify
(match-expression...)
(if (cond1)
result1)
(if (cond2)
result2)
...
resultdefault)
I'm not sure a default makes sense when a previous if failed
Hello,
Ping #2 for https://gcc.gnu.org/ml/gcc-patches/2014-07/msg00237.html
Thanks in advance for your feedback,
With Kind Regards,
Olivier
On Jul 3, 2014, at 16:57 , Olivier Hainque hain...@adacore.com wrote:
From gcc/i386/config/mingw32.h, STARTFILE_SPEC and ENDFILE_SPEC include
Hello Uroš,
On 15 Aug 20:29, Uros Bizjak wrote:
Can you avoid insn constraints like:
+ TARGET_AVX512DQ (MODE_SIZE == 64 || TARGET_AVX512VL)
This should be split to two insn patterns, each with different
baseline insn constraint.
I've splitted pattern into two similar w/ different mode
Hello,
On 15 Aug 20:35, Uros Bizjak wrote:
On Fri, Aug 15, 2014 at 1:56 PM, Kirill Yukhin kirill.yuk...@gmail.com
wrote:
Again, please split insn pattern to avoid:
+ TARGET_SSE2
+mask_mode512bit_condition
+((MODEmode != V16HImode MODEmode != V8HImode)
+ || TARGET_AVX512BW
On Wed, Aug 20, 2014 at 2:51 PM, Kirill Yukhin kirill.yuk...@gmail.com wrote:
Hello Uroš,
On 15 Aug 20:29, Uros Bizjak wrote:
Can you avoid insn constraints like:
+ TARGET_AVX512DQ (MODE_SIZE == 64 || TARGET_AVX512VL)
This should be split to two insn patterns, each with different
$subject.
Bootstrap ongoing on x86_64-unknown-linux-gnu.
Richard.
2014-08-20 Richard Biener rguent...@suse.de
* genmatch.c (copy_reverse): New function.
(parse_simplify): Support nested inner ifs.
* match-comparison.pd: Use nested inner ifs.
Index:
On Wed, Aug 20, 2014 at 3:08 PM, Kirill Yukhin kirill.yuk...@gmail.com wrote:
Hello,
On 15 Aug 20:35, Uros Bizjak wrote:
On Fri, Aug 15, 2014 at 1:56 PM, Kirill Yukhin kirill.yuk...@gmail.com
wrote:
Again, please split insn pattern to avoid:
+ TARGET_SSE2
+mask_mode512bit_condition
Committed.
Richard.
2014-08-20 Richard Biener rguent...@suse.de
* match-and-simplify.texi: Fix errors during pdf build.
Index: gcc/doc/match-and-simplify.texi
===
--- gcc/doc/match-and-simplify.texi (revision
On Tue, Aug 19, 2014 at 4:16 PM, Marc Glisse marc.gli...@inria.fr wrote:
On Tue, 19 Aug 2014, Richard Biener wrote:
/* Return true whether REF may refer to global memory. */
bool
-ref_may_alias_global_p (tree ref)
+ref_may_alias_global_p (ao_ref *ref)
{
- tree base = get_base_address
I would like to add this patch to the 4.9 branch. It is RTEMS
specific and takes advantage of the leon3 multilib support from
Eric Botcazou.
OK to commit?
--joel
gcc/ChangeLog
2013-08-29 Sebastian Hubersebastian.hu...@embedded-brains.de
* config/sparc/t-rtems: Add leon3 multilibs.
On Wed, 20 Aug 2014, Marc Glisse wrote:
On Wed, 20 Aug 2014, Richard Biener wrote:
On Wed, 20 Aug 2014, Marc Glisse wrote:
On Wed, 20 Aug 2014, Richard Biener wrote:
Committed.
Also makes visible a desirable change I plan for if-exprs. They
should behave like
On Wed, Aug 20, 2014 at 9:14 AM, Marc Glisse marc.gli...@inria.fr wrote:
Hello,
here is a new version of the patch which passed bootstrap+testsuite. I am
still removing the ref_maybe_used_by_stmt_p test, see the previous message
for a discussion.
Looks good to me. I'm still nervous about
Hi,
this patch sanifies placement of symtab_remove_unreachable_nodes. First is a
confussion about early local passes. THe superpass TODO contains
symtab_remove_unreachable_nodes that is intended to run after local passes but
PM executes it before (because subpasses are run after TODOs). This is
On Wed, 20 Aug 2014, Richard Biener wrote:
- if (stmt != use_stmt
- ref_maybe_used_by_stmt_p (use_stmt, gimple_assign_lhs
(stmt)))
- return;
-
I don't see how you can remove this code?
dse_possible_dead_store_p already tests ref_maybe_used_by_stmt_p and
thus cannot
On Tue, Aug 19, 2014 at 8:46 PM, Wei Mi w...@google.com wrote:
Sorry for the late reply. I took some time to make myself more
familiar with NORETURN and related code, and finally I understood what
you mean and saw why only GF_CALL_CTRL_ALTERING was enough and
GF_CALL_NORETURN was unneeded.
On 08/18/2014 06:17 PM, Chen Gang wrote:
Then you didn't do a test suite run. make check will create .sum files. Try
cd gcc make check. Then in testsuite/gcc/gcc.sum there will be a file.
After get a new PC, I guess, I have passed make check with
--disable-multilibs (only spent less 10
On Wed, Aug 20, 2014 at 4:18 PM, Marc Glisse marc.gli...@inria.fr wrote:
On Wed, 20 Aug 2014, Richard Biener wrote:
- if (stmt != use_stmt
- ref_maybe_used_by_stmt_p (use_stmt, gimple_assign_lhs
(stmt)))
- return;
-
I don't see how you can remove this code?
Ping -- the patch that depends on this one has been approved, but I am
still waiting for approval on these target-independent bits.
Thanks,
Bill
On Wed, 2014-08-13 at 18:01 -0500, Bill Schmidt wrote:
Hi,
I want to reuse some of the infrastructure in web.c (and df.h) for a
target-specific
On Wed, 20 Aug 2014, Richard Biener wrote:
On Wed, Aug 20, 2014 at 9:14 AM, Marc Glisse marc.gli...@inria.fr wrote:
Hello,
here is a new version of the patch which passed bootstrap+testsuite. I am
still removing the ref_maybe_used_by_stmt_p test, see the previous message
for a discussion.
On Wed, 20 Aug 2014, Marc Glisse wrote:
On Wed, 20 Aug 2014, Richard Biener wrote:
On Wed, Aug 20, 2014 at 9:14 AM, Marc Glisse marc.gli...@inria.fr wrote:
Hello,
here is a new version of the patch which passed bootstrap+testsuite. I am
still removing the ref_maybe_used_by_stmt_p test, see
On Wed, Aug 20, 2014 at 4:30 PM, Bill Schmidt
wschm...@linux.vnet.ibm.com wrote:
Ping -- the patch that depends on this one has been approved, but I am
still waiting for approval on these target-independent bits.
Ok.
Thanks,
Richard.
Thanks,
Bill
On Wed, 2014-08-13 at 18:01 -0500, Bill
Attached patch removes avr devices that are not released
(may not be released in near future also).
If OK, could someone commit please?
Regards,
Pitchumani
gcc/ChangeLog
2014-08-20 Pitchumani Sivanupandi pitchuman...@atmel.com
* config/avr/avr-mcus.def: Remove atmega26hvg, atmega64rfa2,
On Wed, Aug 20, 2014 at 4:31 PM, Marc Glisse marc.gli...@inria.fr wrote:
On Wed, 20 Aug 2014, Richard Biener wrote:
On Wed, Aug 20, 2014 at 9:14 AM, Marc Glisse marc.gli...@inria.fr wrote:
Hello,
here is a new version of the patch which passed bootstrap+testsuite. I am
still removing the
The LEON3/4 soft-core CPU has support for both SPARCv7 and SPARCv8 that
is configurable at design time. The majority of the LEON3 ASICs are v8
compatible, however when designing an as small LEON3 as possible, v7
without FPU is frequently used.
The current GCC leon3 support implies the SPARCv8
On Wed, 20 Aug 2014, Richard Biener wrote:
On Wed, Aug 20, 2014 at 4:18 PM, Marc Glisse marc.gli...@inria.fr wrote:
On Wed, 20 Aug 2014, Richard Biener wrote:
- if (stmt != use_stmt
- ref_maybe_used_by_stmt_p (use_stmt, gimple_assign_lhs
(stmt)))
- return;
-
I don't
Daniel,
Does this mean that Sebastian's patch to add a leon3 multilib for
sparc-rtems
needs to be augmented to handled leon3v7? Or does it need to map to a
regular v7 library?
It just seems like the multilibs should have been touched somehow.
--joel
On 8/20/2014 10:01 AM, Daniel Hellstrom
Hello,
I would ideally like the mcpu=leon3v7 patch applied first (https://gcc.gnu.org/ml/gcc-patches/2014-08/msg02035.html), so that we can change the multi lib patch to include the leon3v7 target. I believe
it would be good for the RTEMS LEON3 BSP to include support for all LEON3/4 processors.
Hi Joel,
Yes an update is required. If/when I get positive comments on the mcpu=leon3v7
patch I will suggest a new updated multilib patch and a RTEMS LEON3 BSP build
configuration change.
I have tested the mcpu=leon3v7 patch with RTEMS leon3 BSP generating V7 instructions, and ngmp generating
2014-08-15 Bill Schmidt wschm...@vnet.ibm.com
* conifg/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Provide
builtin define __VEC_ELEMENT_REG_ORDER__.
Okay.
Thanks, David
This is a trivial patch. However, without it, the addressing mode cost is
incorrectly calculated, since the cost intended for HI end up being used for
SI on A57.
I'd appreciate your considering this patch fixing this issue.
Thank you,
--
Evandro Menezes Austin, USA
On Wed, Aug 20, 2014 at 4:45 PM, Evandro Menezes e.mene...@samsung.com wrote:
This is a trivial patch. However, without it, the addressing mode cost is
incorrectly calculated, since the cost intended for HI end up being used for
SI on A57.
Pinging patches every day isn't going to help :).
On Wed, 2014-08-20 at 06:19 -0400, David Malcolm wrote:
On Wed, 2014-08-20 at 10:20 +0200, Andreas Schwab wrote:
David Malcolm dmalc...@redhat.com writes:
@@ -4083,7 +4083,7 @@ cfg_layout_can_duplicate_bb_p (const_basic_block bb)
return true;
}
-rtx
+rtx_insn *
All,
My apologies for being a pest. :-)
--
Evandro Menezes Austin, TX
-Original Message-
From: Ramana Radhakrishnan [mailto:ramana@googlemail.com]
Sent: Wednesday, August 20, 2014 11:08
To: Evandro Menezes
Cc: James Greenhalgh; gcc-patches; James
I've committed this patch as obvious to trunk and the 4.8
4.9 branches.
2014-08-20 Steven G. Kargl ka...@gcc.gnu.org
PR libgfortran/62188
* m4/bessel.m4: Avoid indexing off the end of an array.
* generated/bessel_r10.c: Regenerated.
* generated/bessel_r16.c:
Completely as an aside: this makes me wonder, whether having and using a similar
macro _inside_ gcc, i.e. for targets to specify the ordering of elements within
a vector independently of BYTES_BIG_ENDIAN, might be a good thing?
--Alan
Bill Schmidt wrote:
Hi,
This adds a macro to indicate
Hi,
while debugging quite werid libgcov issue I noticed that we skip profiling
DECL_EXTERNAL
functions. THis is not quite correct: if the function gets inlined during the
train run,
the counters are used and ought to be streamed. With LTO the profile will get
merged with
the offline copy from
On Wed, 2014-08-20 at 17:28 +0100, Alan Lawrence wrote:
Completely as an aside: this makes me wonder, whether having and using a
similar
macro _inside_ gcc, i.e. for targets to specify the ordering of elements
within
a vector independently of BYTES_BIG_ENDIAN, might be a good thing?
On Tue, Aug 19, 2014 at 09:39:56PM +0100, Steve Ellcey wrote:
Here is an official submission for the switch optimization described in
PR 54742. I have addressed the formatting/comment issues that were raised
and also added a test case based on comment #27 from PR 54742 and I fixed a
bug I
On Aug 20, 2014, at 7:26 AM, Chen Gang gang.chen.5...@gmail.com wrote:
- for each test, always contents unexpected errors for gcc, g++ ...
but make check skip them and continue, at last still echo $? = 0.
I use make -k -j16. It is roughly 16x faster. I’d use -jn where n is the
core count.
On Wed, 2014-08-20 at 12:09 -0400, David Malcolm wrote:
On Wed, 2014-08-20 at 06:19 -0400, David Malcolm wrote:
On Wed, 2014-08-20 at 10:20 +0200, Andreas Schwab wrote:
David Malcolm dmalc...@redhat.com writes:
@@ -4083,7 +4083,7 @@ cfg_layout_can_duplicate_bb_p (const_basic_block
Today I was playing with my -Wlogical-not-parentheses warning and
unfortunately I discovered two bugs:
1) if we have an expression consisting of more binary subexpression,
such as n 5 || !n 10, we don't warn for the second subexpr,
because the code looked for ! only on the very first LHS.
On Sun, 17 Aug 2014, Chen Gang wrote:
2014-08-17 Chen Gang gang.chen.5...@gmail.com
* c/c-aux-info.c (gen_type): Resize 'buff' from 10 to 23 bytes.
This patch is OK, subject to testing, though the ChangeLog entry needs to
reflect the change to using HOST_WIDE_INT without truncation
On 08/21/2014 02:06 AM, Joseph S. Myers wrote:
On Sun, 17 Aug 2014, Chen Gang wrote:
2014-08-17 Chen Gang gang.chen.5...@gmail.com
* c/c-aux-info.c (gen_type): Resize 'buff' from 10 to 23 bytes.
This patch is OK, subject to testing, though the ChangeLog entry needs to
reflect the
On 08/21/2014 01:35 AM, Mike Stump wrote:
On Aug 20, 2014, at 7:26 AM, Chen Gang gang.chen.5...@gmail.com wrote:
- for each test, always contents unexpected errors for gcc, g++ ...
but make check skip them and continue, at last still echo $? = 0.
I use make -k -j16. It is roughly 16x
Could we set current.lhs_type to TRUTH_NOT_EXPR when we see a ! rather
than track nots in two separate local variables?
Jason
Add more diagnostics for variable concepts. Also fix a regression
where non-template concepts variables were causing ICEs because they
aren't being allocated via build_lang_decl.
2014-08-15 Andrew Sutton andrew.n.sut...@gmail.com
Additional declaration restrictions on variable concepts.
*
On Aug 20, 2014, at 11:29 AM, Chen Gang gang.chen.5...@gmail.com wrote:
It sounds useful to me. At present, my PC is 4 core, so I guess, -j2
No, -j4…. should be around twice as fast as -j2 on your machine (assuming you
aren’t memory starved (4GB or more)).
for 2 directories are enough.
Hi,
On 08/20/2014 08:56 PM, Andrew Sutton wrote:
+ return VAR_P (decl)
+ DECL_LANG_SPECIFIC (decl)
+ DECL_DECLARED_CONCEPT_P (decl);
this is brittle from the formatting point of view. Please double check
in detail what I'm going to say, but I think that in such cases you
Good suggestion. Add the testcase.
thanks
Guozhi Wei
2014-08-20 Guozhi Wei car...@google.com
PR target/62040
* gcc.target/aarch64/pr62040.c: New test.
Index: pr62040.c
===
--- pr62040.c (revision 0)
+++ pr62040.c
On Wed, Aug 20, 2014 at 02:36:21PM -0400, Jason Merrill wrote:
Could we set current.lhs_type to TRUTH_NOT_EXPR when we see a ! rather than
track nots in two separate local variables?
Good point. So like the following? I haven't had time to run the full
regtest/bootstrap cycle yet, but at
On Wed, 2014-05-21 at 10:48 +0200, Samuel Thibault wrote:
Svante Signell, le Wed 21 May 2014 10:44:54 +0200, a écrit :
On Wed, 2014-05-21 at 10:33 +0200, Arnaud Charlet wrote:
I think the majority of work has bee done, Now that patch will change
slightly for every missing feature
James Greenhalgh wrote:
On Tue, Aug 19, 2014 at 09:39:56PM +0100, Steve Ellcey wrote:
Here is an official submission for the switch optimization described in
PR 54742. I have addressed the formatting/comment issues that were raised
and also added a test case based on comment #27 from PR
On 08/20/2014 04:02 PM, Marek Polacek wrote:
On Wed, Aug 20, 2014 at 02:36:21PM -0400, Jason Merrill wrote:
Could we set current.lhs_type to TRUTH_NOT_EXPR when we see a ! rather than
track nots in two separate local variables?
Good point. So like the following?
I was thinking to do away
On 08/20/2014 08:56 PM, Andrew Sutton wrote:
+ return VAR_P (decl)
+ DECL_LANG_SPECIFIC (decl)
+ DECL_DECLARED_CONCEPT_P (decl);
this is brittle from the formatting point of view. Please double check in
detail what I'm going to say, but I think that in such cases you
Fixes a regression in lookup rules involving declarations with
nested-name-specifiers. In particular, we don't actually want to
execute these rules if we absolutely don't have to.
2014-08-15 Andrew Sutton andrew.n.sut...@gmail.com
Fixing regression in scoping rules for templates.
*
On 20/08/2014 00:02, Joseph S. Myers wrote:
On Fri, 15 Aug 2014, Sylvestre Ledru wrote:
It is indeed useless. I removed it. Thanks
http://sylvestre.ledru.info/0001-Enable-warning-Wreturn-type-by-default.patch
I don't think most of the testsuite changes in this patch should be
needed, and we
On Wed, 20 Aug 2014, Sylvestre Ledru wrote:
On 20/08/2014 00:02, Joseph S. Myers wrote:
On Fri, 15 Aug 2014, Sylvestre Ledru wrote:
It is indeed useless. I removed it. Thanks
http://sylvestre.ledru.info/0001-Enable-warning-Wreturn-type-by-default.patch
I don't think most of the
On 08/21/2014 03:23 AM, Mike Stump wrote:
On Aug 20, 2014, at 11:29 AM, Chen Gang gang.chen.5...@gmail.com wrote:
It sounds useful to me. At present, my PC is 4 core, so I guess, -j2
No, -j4…. should be around twice as fast as -j2 on your machine (assuming
you aren’t memory starved (4GB
What are the rules for etags, is it fair game to generate them for
variables defined in the build directory (as opposed to the source
directory)?
For instance, my editor can't find flag_generate_lto because the TAGS
rule in Makefile.in runs etags for source file *.h files (not those in
the
On Wed, 2014-08-13 at 11:57 -0600, Jeff Law wrote:
On 08/06/14 11:20, David Malcolm wrote:
gcc/
* basic-block.h (get_last_bb_insn): Strengthen return type from
rtx to rtx_insn *.
* cfgrtl.c (get_last_bb_insn): Likewise, and for locals tmp and
end.
OK.
Thanks. Committed
On Wed, 2014-08-13 at 12:00 -0600, Jeff Law wrote:
On 08/06/14 11:20, David Malcolm wrote:
gcc/
* sel-sched-ir.h (exit_insn): Strengthen from rtx to rtx_insn *.
(sel_bb_head): Strengthen return type insn_t (currently just an
rtx) to rtx_insn *.
(sel_bb_end): Likewise.
Hi,
The Power ISA 2.07 enables some additional forms of existing vector
builtins, in particular allowing use of vector long long (signed and
unsigned) and vector double forms. This patch adds those builtins and
provides documentation for them. There are also cases where builtins
from ISA 2.06
On Wed, 2014-08-13 at 12:01 -0600, Jeff Law wrote:
On 08/06/14 11:20, David Malcolm wrote:
gcc/
* rtl.h (find_first_parameter_load): Strengthen return type from
rtx to rtx_insn *.
* rtlanal.c (find_first_parameter_load): Strengthen return type
from rtx to rtx_insn *.
On Wed, 2014-08-13 at 12:02 -0600, Jeff Law wrote:
On 08/06/14 11:20, David Malcolm wrote:
gcc/
* sel-sched-ir.h (create_insn_rtx_from_pattern): Strengthen return
type from rtx to rtx_insn *.
* sel-sched-ir.h (create_copy_of_insn_rtx): Likewise.
* sel-sched-ir.c
On Wed, Aug 20, 2014 at 8:41 PM, Bill Schmidt
wschm...@linux.vnet.ibm.com wrote:
Hi,
The Power ISA 2.07 enables some additional forms of existing vector
builtins, in particular allowing use of vector long long (signed and
unsigned) and vector double forms. This patch adds those builtins and
Hi,
This patch is to improve the output of strict_aliasing_warning. This
version will output the expression of rhs, type of that expression,
and the type of lhs. That make it easier to debug strict aliasing
bug.
* tree-inline.c (setup_one_parameter): Add strict aliasing check.
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