On Tue, Aug 04, 2015 at 11:06:11AM +0100, Pawel Kupidura wrote:
Hi,
I'm sorry about the issues with formatting, it should be fixed now.
Here's corrected version with diff to current trunk.
Hi Pawel,
I'm still having trouble getting this patch to apply, I'm not sure whether
it is the
James Greenhalgh wrote:
On Tue, Jul 28, 2015 at 12:25:55PM +0100, Alan Lawrence wrote:
gcc/ChangeLog:
* config/aarch64/aarch64.c (aarch64_split_simd_combine): Add V4HFmode.
* config/aarch64/aarch64-builtins.c (VAR13, VAR14): New.
(aarch64_scalar_builtin_types,
On Tue, Aug 4, 2015 at 7:05 AM, Jeff Law l...@redhat.com wrote:
On 07/17/2015 01:57 PM, Abe wrote:
Dear all,
Relative to the previous submission of this same patch, the below
corrects some minor spacing and/or indentation issues,
misc. other formatting fixes, and makes the disabled
Hi!
On Thu, 8 Jan 2015 07:02:19 -0800, H.J. Lu hjl.to...@gmail.com wrote:
On Thu, Jan 8, 2015 at 6:59 AM, Thomas Schwinge tho...@codesourcery.com
wrote:
On Mon, 22 Dec 2014 12:28:20 +0100, Jakub Jelinek ja...@redhat.com wrote:
On Mon, Dec 22, 2014 at 12:25:32PM +0100, Thomas Schwinge
On Tue, Aug 4, 2015 at 10:52 AM, Kumar, Venkataramanan
venkataramanan.ku...@amd.com wrote:
Hi Jeff,
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Jeff Law
Sent: Monday, August 03, 2015 11:42 PM
To: Kumar, Venkataramanan;
James Greenhalgh wrote:
-;; All modes.
+;; All vector modes on which we support any arithmetic operations.
(define_mode_iterator VALL [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V2SF V4SF
V2DF])
-;; All vector modes and DI.
+;; All vector modes, including HF modes on which we cannot operate
The
James Greenhalgh wrote:
Hi Alan,
The arm_neon.h portion of this patch does not apply after Charles' recent
changes. Could you please rebase and resubmit the patch for review?
Thanks,
James
These are straightforward copies of the corresponding uint16 tests, with
appropriate substitutions
Sorry, attached the wrong file. Here!
--Alan
Alan Lawrence wrote:
James Greenhalgh wrote:
-;; All modes.
+;; All vector modes on which we support any arithmetic operations.
(define_mode_iterator VALL [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V2SF V4SF
V2DF])
-;; All vector modes and DI.
+;;
On 28/07/15 12:24, Alan Lawrence wrote:
This is a respin of https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00479.html,
again to make the intrinsics available only if we have a scalar __fp16 type.
This does not fix existing indentation issues in neon.md but rather keeps the
affected lines
Hello,
I've merged ptest insn patterns from AVX and SSE.
I've also extended mode iterator to allow any 128/256 bit mode
for the insn as it register-wide, which may help implementing
https://gcc.gnu.org/ml/gcc-patches/2015-05/msg02788.html
Bootstrapped and regtested.
If no objections, I'll
On 04/08/15 11:48, James Greenhalgh wrote:
On Tue, Aug 04, 2015 at 11:06:11AM +0100, Pawel Kupidura wrote:
Hi,
I'm sorry about the issues with formatting, it should be fixed now.
Here's corrected version with diff to current trunk.
Hi Pawel,
I'm still having trouble getting this patch
On 04 Aug 15:31, Kirill Yukhin wrote:
On 04 Aug 14:10, Uros Bizjak wrote:
On Tue, Aug 4, 2015 at 1:47 PM, Kirill Yukhin kirill.yuk...@gmail.com
wrote:
Hello,
- (set_attr prefix_data16 *,*,*,1,*,*,*,*)
- (set_attr prefix orig,vex,maybe_vex,orig,vex,maybe_vex,orig,orig)
-
On Tue, Aug 4, 2015 at 1:58 PM, Kirill Yukhin kirill.yuk...@gmail.com wrote:
Hello,
I've merged ptest insn patterns from AVX and SSE.
I've also extended mode iterator to allow any 128/256 bit mode
for the insn as it register-wide, which may help implementing
On Tue, Aug 4, 2015 at 1:47 PM, Kirill Yukhin kirill.yuk...@gmail.com wrote:
Hello,
For vec_dup and vec_concat patterns (of v2df mode) second operand
is of scalar mode, so `ix86_hard_regno_mode_ok’ didn’t block EVEX registers,
of non-512b modes (when AVX-512VL is turned off).
This turns into
On 21 July 2015 at 16:01, Kyrill Tkachov kyrylo.tkac...@arm.com wrote:
On 16/07/15 08:56, Christophe Lyon wrote:
AdvSIMD vget_lane tests currently fail on armeb targets when dealing
with vectors of 2 64-bits elements. This patches fixes it, by adding a
code fragment similar to what is dones
On Wed, Jul 22, 2015 at 8:44 AM, H.J. Lu hjl.to...@gmail.com wrote:
On Wed, Jul 22, 2015 at 6:59 AM, H.J. Lu hjl.to...@gmail.com wrote:
On Wed, Jul 22, 2015 at 6:55 AM, Segher Boessenkool
seg...@kernel.crashing.org wrote:
On Wed, Jul 22, 2015 at 05:10:04AM -0700, H.J. Lu wrote:
I got a
Hi!
Testing some offloading patches for trunk, I'm encountering the same
problem already reported here:
On Fri, 31 Jul 2015 20:13:02 +0300, Ilya Verbin iver...@gmail.com wrote:
On Fri, Jul 31, 2015 at 18:59:59 +0200, Jakub Jelinek wrote:
On Fri, Jul 31, 2015 at 07:53:16PM +0300, Ilya Verbin
On Tue, Aug 4, 2015 at 2:15 PM, Richard Biener rguent...@suse.de wrote:
This patch adds scatter support for vectorizer (for AVX512F
instructions). Please have a look. Is it OK for trunk?
+/* Target builtin that implements vector scatter operation. */
+DEFHOOK
+(builtin_scatter,
+ ,
+
On 04/08/15 09:53, James Greenhalgh wrote:
On Mon, Aug 03, 2015 at 04:20:13PM +0100, Kyrill Tkachov wrote:
Ok, I've removed usages of 'ret' in favor of returning when appropriate.
In this last one I left the ret (but cleaned up the control flow a bit)
because if the processing fails we need to
On 16/07/15 10:24, Szabolcs Nagy wrote:
On 06/07/15 11:24, James Greenhalgh wrote:
Please make sure in a follow-up patch that the costing logic in
aarch64_rtx_costs also gets updated.
Tested with aarch64-none-linux-gnu cross compiler.
is this OK?
i assume i should backport the fnmul fixes
On Thu, Jul 16, 2015 at 10:24:20AM +0100, Szabolcs Nagy wrote:
On 06/07/15 11:24, James Greenhalgh wrote:
Please make sure in a follow-up patch that the costing logic in
aarch64_rtx_costs also gets updated.
Tested with aarch64-none-linux-gnu cross compiler.
is this OK?
This is OK,
This makes the code ready for the lightweight overloads, reducing
the amount of checking we have to compile in stage2.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2015-08-04 Richard Biener rguent...@suse.de
* genmatch.c (dt_node::gen_kids_1): Use gassign
On Tue, Aug 4, 2015 at 3:06 PM, Ilya Verbin iver...@gmail.com wrote:
On Tue, Aug 04, 2015 at 14:35:11 +0200, Thomas Schwinge wrote:
On Fri, 31 Jul 2015 20:13:02 +0300, Ilya Verbin iver...@gmail.com wrote:
On Fri, Jul 31, 2015 at 18:59:59 +0200, Jakub Jelinek wrote:
On Wed, Feb 18, 2015 at
Thanks for verifying!
Also verified it still works on powerpc64le-unknown-linux-gnu.
Committed as obvious.
Thanks,
Bill
2015-08-04 Bill Schmidt wschm...@vnet.linux.ibm.com
* gcc.target/powerpc/vec-cmp-sel.c: Avoid test failure on machines
without VSX an Power8 vector
On Tue, Aug 4, 2015 at 4:21 PM, Richard Biener
richard.guent...@gmail.com wrote:
On Tue, Aug 4, 2015 at 4:15 PM, Richard Sandiford
richard.sandif...@arm.com wrote:
Richard Biener richard.guent...@gmail.com writes:
On Tue, Aug 4, 2015 at 10:52 AM, Kumar, Venkataramanan
Hi DJ,
It turns out that the optimization in rl78_force_nonfar_3 to allow
some special cases to be kept in far pointers does not always work.
The test case included with this patch will trigger ICEs if the
optimization is allowed to persist.
So, may I check this patch in please ?
Fixes PR 18669 raised against gdb/binutils.
https://sourceware.org/bugzilla/show_bug.cgi?id=18669
While it is possible to roll our own strtod that handles hexadecimal
to float conversion, I'm no longer interested taking time out to
implement or maintain such a thing. So the next obvious thing
Dear Mikael,
Thanks for your comments. I will commit the patch tonight. If folk get
steamed up about .smod files appearing when they compile their
favourite non-submodule-based code, I guess that we can put in a
compilation flag to suppress them. We have plenty of time to tweak
this before the
On Thu, Jul 16, 2015 at 11:21:25AM +0100, Jiong Wang wrote:
Jeff Law writes:
On 06/23/2015 02:29 AM, Ramana Radhakrishnan wrote:
If you try disabling the REG_EQUAL note generation [*], you'll probably
find a
performance regression on arm32 (and probably on aarch64 as well?
we
On Tue, Jul 21, 2015 at 01:42:35PM +0100, Jiong Wang wrote:
Jiong Wang writes:
Alexander Monakov writes:
Attachment is the patch which repair -fno-plt support for AArch64.
aarch64_is_noplt_call_p will only be true if:
* gcc is generating position independent code.
*
On 03/08/15 17:26, James Greenhalgh wrote:
On Mon, Jul 27, 2015 at 02:22:41PM +0100, Pawel Kupidura wrote:
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 10df325..ffafc3f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2015-07-27 Pawel Kupidurapawel.kupid...@arm.com
Two
Attachment has gone awol here too. Sorry for the bother, please ignore
previous...
Alan Lawrence wrote:
James Greenhalgh wrote:
On Tue, Jul 28, 2015 at 12:25:55PM +0100, Alan Lawrence wrote:
gcc/ChangeLog:
* config/aarch64/aarch64.c (aarch64_split_simd_combine): Add V4HFmode.
Hello,
For vec_dup and vec_concat patterns (of v2df mode) second operand
is of scalar mode, so `ix86_hard_regno_mode_ok’ didn’t block EVEX registers,
of non-512b modes (when AVX-512VL is turned off).
This turns into 128/256b xmm[15] regs emit on -march=knl.
There’re should be more patterns w/
I've committed this to gomp4 branch. It creates a new builtin to be used for
worker-level reductions that Cesar is working on. When the builtin is expanded
it allocates a slot in a new .shared array to hold the reduction variable. This
array is reused for reductions on different loops.
I
I've applied this to gomp4 branch.
There was an inconsistency with the 'S' assembly formatter, in that it didn't
print the leading '.', but the others did. Also the pseudo's structure is no
longer used.
nathan
2015-08-04 Nathan Sidwell nat...@codesourcery.com
* config/nvptx/nvptx.md
Since IAMCU tests clear all scratch integer registers with:
asm __volatile__ (xor %%eax, %%eax\n\t \
xor %%edx, %%edx\n\t \
xor %%ecx, %%ecx\n\t \
::: eax, edx, ecx);
PIC register may be trashed between setting PIC register and using
On Tue, Aug 04, 2015 at 09:58:37AM +0100, Kyrill Tkachov wrote:
On 04/08/15 09:53, James Greenhalgh wrote:
On Mon, Aug 03, 2015 at 04:20:13PM +0100, Kyrill Tkachov wrote:
Ok, I've removed usages of 'ret' in favor of returning when appropriate.
In this last one I left the ret (but cleaned
Following patch substantially improves generated code for
get_fpu_trap_exceptions, reducing insn count from 31 to 9.
2015-08-04 Uros Bizjak ubiz...@gmail.com
* config/fpu-387.h (get_fpu_trap_exceptions): Add temporary variable
to improve generated code.
Bootstrapped and regression
On 4 August 2015 at 14:09, Christophe Lyon christophe.l...@linaro.org wrote:
On 21 July 2015 at 16:01, Kyrill Tkachov kyrylo.tkac...@arm.com wrote:
On 16/07/15 08:56, Christophe Lyon wrote:
AdvSIMD vget_lane tests currently fail on armeb targets when dealing
with vectors of 2 64-bits
Pawel Kupidura pawel.kupid...@arm.com writes:
Hi,
The issue was flowed format forced by mail client. I've tested it and
the patch should apply now.
Thanks, applied based on James's OK.
Richard
This adds a pattern matching x != ~x on GIMPLE and allows CCP to
properly optimize the added testcase. gimple_simplify gets confused
by the existing ~x == 1 - x == 0 pattern which
gimple_fold_stmt_to_constant_1 cannot reduce to a single value.
Bootstrapped and tested on
On 08/03/2015 07:02 PM, Martin Sebor wrote:
I've prototyped this approach in a couple places in the middle
end. Both implementations are very simple and work great when
the code isn't optimized away. The problem is that the
optimizations done at various points between the front end and
the final
On Tue, Aug 04, 2015 at 16:07:42 +0200, Richard Biener wrote:
On Tue, Aug 4, 2015 at 3:06 PM, Ilya Verbin iver...@gmail.com wrote:
On Tue, Aug 04, 2015 at 14:35:11 +0200, Thomas Schwinge wrote:
On Fri, 31 Jul 2015 20:13:02 +0300, Ilya Verbin iver...@gmail.com wrote:
On Fri, Jul 31, 2015 at
Richard Biener richard.guent...@gmail.com writes:
On Tue, Aug 4, 2015 at 4:21 PM, Richard Biener
richard.guent...@gmail.com wrote:
On Tue, Aug 4, 2015 at 4:15 PM, Richard Sandiford
richard.sandif...@arm.com wrote:
Richard Biener richard.guent...@gmail.com writes:
On Tue, Aug 4, 2015 at 10:52
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
Richard.
2015-08-04 Richard Biener rguent...@suse.de
* gimple-fold.c (gimple_fold_stmt_to_constant_1): Remove
dispatching to fold_binary for GIMPLE_BINARY_RHS and for
comparisons embedded in
On Tue, Jul 28, 2015 at 02:12:36PM +0100, Jiong Wang wrote:
The instruction sequences for preparing argument for TLS descriptor
runtime resolver and the later function call to resolver can actually be
hoisted out of the loop.
Currently we can't because we have exposed the hard register X0
On Mon, Aug 03, 2015 at 04:20:13PM +0100, Kyrill Tkachov wrote:
Ok, I've removed usages of 'ret' in favor of returning when appropriate.
In this last one I left the ret (but cleaned up the control flow a bit)
because if the processing fails we need to clean up a bit of state before
returning.
Hi Jeff,
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
ow...@gcc.gnu.org] On Behalf Of Jeff Law
Sent: Monday, August 03, 2015 11:42 PM
To: Kumar, Venkataramanan; Jakub Jelinek
Cc: Richard Beiner (richard.guent...@gmail.com); gcc-patches@gcc.gnu.org
On 03/08/15 18:37, Uros Bizjak wrote:
On Mon, Aug 3, 2015 at 7:20 PM, Kyrill Tkachov kyrylo.tkac...@arm.com wrote:
Looking at the x86 movcc expansion code (ix86_expand_int_movcc) I
don't think this is a good idea. In the expander, there is already
quite some target-dependent code that goes
Hi,
This patch follows on from
[PATCH][1/N] Change GET_MODE_INNER to always return a non-void mode
It is another tidy up, replacing the pattern
GET_MODE_BITSIZE (GET_MODE_INNER (m)) with GET_MODE_UNIT_BITSIZE (m). Also
replaces any calls to GET_MODE_PRECISION (GET_MODE_INNER (m)) with
On Tue, Aug 04, 2015 at 14:35:11 +0200, Thomas Schwinge wrote:
On Fri, 31 Jul 2015 20:13:02 +0300, Ilya Verbin iver...@gmail.com wrote:
On Fri, Jul 31, 2015 at 18:59:59 +0200, Jakub Jelinek wrote:
On Wed, Feb 18, 2015 at 11:00:35 +0100, Jakub Jelinek wrote:
+ /* First search just
This removal of unused structure is now committed to trunk too.
nathan
2015-08-04 Nathan Sidwell nat...@codesourcery.com
* config/nvptx/nvptx.h (struct nvptx_pseudo_info): Delete.
(machine_function): Remove pseudos field.
Index: gcc/config/nvptx/nvptx.h
On Fri, 31 Jul 2015, Petr Murzin wrote:
Hello,
This patch adds scatter support for vectorizer (for AVX512F
instructions). Please have a look. Is it OK for trunk?
+/* Target builtin that implements vector scatter operation. */
+DEFHOOK
+(builtin_scatter,
+ ,
+ tree,
+ (const_tree vectype,
On 04 Aug 14:10, Uros Bizjak wrote:
On Tue, Aug 4, 2015 at 1:47 PM, Kirill Yukhin kirill.yuk...@gmail.com wrote:
Hello,
- (set_attr prefix_data16 *,*,*,1,*,*,*,*)
- (set_attr prefix orig,vex,maybe_vex,orig,vex,maybe_vex,orig,orig)
- (set_attr mode
On 04 Aug 14:06, Uros Bizjak wrote:
On Tue, Aug 4, 2015 at 1:58 PM, Kirill Yukhin kirill.yuk...@gmail.com wrote:
+ (set (attr btver2_decode)
+ (if_then_else
+ (and (eq_attr alternative 2)
+ (match_test sseinsnmodemode==OImode))
+ (const_string vector)
+
On Mon, 3 Aug 2015, Martin Sebor wrote:
because the ternary ?: expression is folded into a constant by
the front end even before it reaches the gimplifier, while the
if-else statement isn't folded until the control flow graph is
built. (As an aside: I'm wondering why that is. Why have the
On Aug 4, 2015, at 5:30 AM, H.J. Lu hjl.to...@gmail.com wrote:
Where does this feature belong?
I prefer the middle end.
On Tue, Aug 4, 2015 at 8:40 AM, Mike Stump mikest...@comcast.net wrote:
On Aug 4, 2015, at 5:30 AM, H.J. Lu hjl.to...@gmail.com wrote:
Where does this feature belong?
I prefer the middle end.
Any comments on my middle-end patch?
Thanks.
--
H.J.
Updated changelog and attached patch based on Alan's comments.
gcc/ChangeLog
2015-07-30Lynn Boger labo...@linux.vnet.ibm.com
PR66870
* gcc/config/rs6000/rs6000.c (rs6000_emit_prologue): Check for
no_split_stack function attribute along with
On Aug 4, 2015, Richard Biener richard.guent...@gmail.com wrote:
Though I wonder on whether splitting the patch into a first one with disabling
coalescing of parms (their default defs(?)) and a followup implementing the
support for that.
We can't disable coalescing of parms altogether. With
You indeed need to use CONVERT_EXPR here, maybe you can elaborate
on the optimization issues.
2. for inline asm (a reduced test case that might not make much as a
stand alone test-case, but I ran into similar cases with valid programmes)
;; Function fn1 (fn1, funcdef_no=0, decl_uid=4220,
This patch by Chris Manghane fixes the Go frontend to use the type
context to determine the type of a complex constant. This fixes
https://golang.org/issue/11572 . Bootstrapped and ran Go testsuite on
x86_64-unknown-linux-gnu. Committed to mainline.
Ian
Index: gcc/go/gofrontend/MERGE
I've backported three recent libgo patches to the GCC 5 branch, as follows.
Ian
Index: libgo/Makefile.am
===
--- libgo/Makefile.am (revision 226591)
+++ libgo/Makefile.am (working copy)
@@ -1676,7 +1676,17 @@ endif #
On Mon, Aug 3, 2015 at 5:49 PM, Michael Meissner
meiss...@linux.vnet.ibm.com wrote:
In preparing the next IEEE 128-bit floating point patch, I needed a quick way
to load -0.0q into a vector registers (i.e. just the MSB set). I originally
had
a special purpose insn to load this value, but I
On 08/04/15 12:17, Thomas Schwinge wrote:
Hi!
Nathan's patch is waiting for trunk approval:
Then, for convenience, I'm also again attaching Nathan's patch:
trunk-version-4.patch.
Nathan, for the trunk commit, I suggest you simply merge my patch into
yours.
Yes, I'll atomically commit
On Tue, Aug 4, 2015 at 10:43 AM, Segher Boessenkool
seg...@kernel.crashing.org wrote:
On Tue, Aug 04, 2015 at 10:28:00AM -0700, H.J. Lu wrote:
Any comments on my middle-end patch?
So, if the answer is the same as frame_address (0), why not have the
fallback just expand to that? Then,
This is OK, but note that it prevents some operations like:
__far int i;
foo()
{
i ++;
}
from being implemented with a minimum set of opcodes. This might be
particularly troublesome for volatile far things.
Hi,
On 06/24/2015 05:32 PM, Ed Smith-Rowland wrote:
Index: testsuite/g++.dg/cpp1z/static_assert-nomsg.C
===
--- testsuite/g++.dg/cpp1z/static_assert-nomsg.C(revision 0)
+++ testsuite/g++.dg/cpp1z/static_assert-nomsg.C
On Aug 4, 2015, at 8:44 AM, H.J. Lu hjl.to...@gmail.com wrote:
On Tue, Aug 4, 2015 at 8:40 AM, Mike Stump mikest...@comcast.net wrote:
On Aug 4, 2015, at 5:30 AM, H.J. Lu hjl.to...@gmail.com wrote:
Where does this feature belong?
I prefer the middle end.
Any comments on my middle-end
Hi!
Nathan's patch is waiting for trunk approval:
On Sat, 1 Aug 2015 20:06:39 -0400, Nathan Sidwell nat...@acm.org wrote:
On 07/31/15 12:10, Jakub Jelinek wrote:
This will hopefully be just GOMP_4.1 instead in the end, but it can
change when gomp-4_1-branch is merged to trunk, we don't
... to avoid
perl ../../gcc-svn/trunk/gcc/../contrib/texi2pod.pl
../../gcc-svn/trunk/gcc/doc/invoke.texi gcc.pod
Unescaped left brace in regex is deprecated, passed through in regex;
marked by -- HERE in m/^\@strong{ -- HERE (.*)}$/ at
../../gcc-svn/trunk/gcc/../contrib/texi2pod.pl line 319.
Hi,
the attached patch removes redundant -save-temps options from some libstdc++
tests, since the option is not needed in dg-do-compile/scan-assembler tests.
Thanks,
Nikolai
2015-08-04 Nikolai Bozhenov n.bozhe...@samsung.com
* testsuite/20_util/enable_shared_from_this/cons/constexpr.cc:
On Mon, 2015-08-03 at 13:23 +0300, Maxim Blumental wrote:
Could you probably review the patch, please?
Sorry, I'm not the best person to review the patch: Jakub CCed me for my
knowledge of python, so I ported his script to work with both python 2
and 3, and it ought to work with early python 2
Richard Biener richard.guent...@gmail.com writes:
On August 4, 2015 4:28:26 PM GMT+02:00, Richard Sandiford
richard.sandif...@arm.com wrote:
Richard Biener richard.guent...@gmail.com writes:
On Tue, Aug 4, 2015 at 4:21 PM, Richard Biener
richard.guent...@gmail.com wrote:
On Tue, Aug 4, 2015
Hi Richard,
-Original Message-
From: Richard Biener [mailto:richard.guent...@gmail.com]
Sent: Tuesday, August 04, 2015 4:07 PM
To: Kumar, Venkataramanan
Cc: Jeff Law; Jakub Jelinek; gcc-patches@gcc.gnu.org
Subject: Re: [RFC] [Patch]: Try and vectorize with shift for mult expr with
On Tue, Aug 4, 2015 at 10:16 AM, Mike Stump mikest...@comcast.net wrote:
On Aug 4, 2015, at 8:44 AM, H.J. Lu hjl.to...@gmail.com wrote:
On Tue, Aug 4, 2015 at 8:40 AM, Mike Stump mikest...@comcast.net wrote:
On Aug 4, 2015, at 5:30 AM, H.J. Lu hjl.to...@gmail.com wrote:
Where does this feature
On Tue, Aug 04, 2015 at 10:28:00AM -0700, H.J. Lu wrote:
Any comments on my middle-end patch?
So, if the answer is the same as frame_address (0), why not have the
fallback just expand to that? Then, one can use this builtin everywhere
that frame address is used today. People that
On Tue, Aug 4, 2015 at 11:50 AM, H.J. Lu hjl.to...@gmail.com wrote:
On Tue, Aug 4, 2015 at 10:43 AM, Segher Boessenkool
seg...@kernel.crashing.org wrote:
On Tue, Aug 04, 2015 at 10:28:00AM -0700, H.J. Lu wrote:
Any comments on my middle-end patch?
So, if the answer is the same as
On Tue, Jun 16, 2015 at 4:22 PM, Sriraman Tallam tmsri...@google.com wrote:
On Tue, May 19, 2015 at 9:11 AM, Xinliang David Li davi...@google.com wrote:
Hm. But which options are unsafe? Also wouldn't it be better to simply
_not_ have unsafe options produce comdats but always make local
On Tue, Aug 4, 2015 at 12:29 PM, Segher Boessenkool
seg...@kernel.crashing.org wrote:
On Tue, Aug 04, 2015 at 11:50:00AM -0700, H.J. Lu wrote:
The motivation of __builtin_stack_top is that frame_address requires a
frame pointer register, which isn't desirable for x86.
__builtin_stack_top
On Tue, Aug 4, 2015 at 1:45 PM, Segher Boessenkool
seg...@kernel.crashing.org wrote:
On Tue, Aug 04, 2015 at 01:00:32PM -0700, H.J. Lu wrote:
There is another issue with x86, maybe other targets. You
can't get the real stack top when stack is realigned and
-maccumulate-outgoing-args isn't
On Tue, Aug 04, 2015 at 01:00:32PM -0700, H.J. Lu wrote:
There is another issue with x86, maybe other targets. You
can't get the real stack top when stack is realigned and
-maccumulate-outgoing-args isn't used since ix86_expand_prologue
will create and return another stack frame for
On Tue, Aug 04, 2015 at 11:50:00AM -0700, H.J. Lu wrote:
The motivation of __builtin_stack_top is that frame_address requires a
frame pointer register, which isn't desirable for x86. __builtin_stack_top
doesn't require a frame pointer register.
If the target just returns
On 08/04/2015 09:04 AM, Jason Merrill wrote:
This is largely historical baggage, I think, from days where computers
had less memory and we were trying to do as much processing as possible
immediately.
Right. Also note the early folding was from a time before we had the
gimple optimization
On August 4, 2015 4:28:26 PM GMT+02:00, Richard Sandiford
richard.sandif...@arm.com wrote:
Richard Biener richard.guent...@gmail.com writes:
On Tue, Aug 4, 2015 at 4:21 PM, Richard Biener
richard.guent...@gmail.com wrote:
On Tue, Aug 4, 2015 at 4:15 PM, Richard Sandiford
I've committed this to gomp4 branch. It optimizes the new GOACC_DIM_SIZE and
GOACC_DIM_POS bultins for constant dimensions. In addition:
*) added a target-specific dimension validation and defaulting hook. Provided a
ptx implementation.
*) Made GOACC_DIM_POS pure, to allow some
This patch from Chris Manghane ensures that when verifying a pointer
type, we verify the underlying type. This fixes
https://golang.org/issue/11547 . Bootstrapped and ran Go testsuite on
x86_64-unknown-linux-gnu. Committed to mainline.
Ian
Index: gcc/go/gofrontend/MERGE
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